{"id":"https://openalex.org/W2509603387","doi":"https://doi.org/10.1587/elex.13.20160749","title":"A fast lock-in all-digital phase-locked loop in 40-nm CMOS technology","display_name":"A fast lock-in all-digital phase-locked loop in 40-nm CMOS technology","publication_year":2016,"publication_date":"2016-01-01","ids":{"openalex":"https://openalex.org/W2509603387","doi":"https://doi.org/10.1587/elex.13.20160749","mag":"2509603387"},"language":"en","primary_location":{"id":"doi:10.1587/elex.13.20160749","is_oa":true,"landing_page_url":"https://doi.org/10.1587/elex.13.20160749","pdf_url":"https://www.jstage.jst.go.jp/article/elex/13/17/13_13.20160749/_pdf","source":{"id":"https://openalex.org/S207433681","display_name":"IEICE Electronics Express","issn_l":"1349-2543","issn":["1349-2543","1349-9467"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Electronics Express","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"diamond","oa_url":"https://www.jstage.jst.go.jp/article/elex/13/17/13_13.20160749/_pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5039183654","display_name":"Ching-Che Chung","orcid":"https://orcid.org/0000-0003-1398-4320"},"institutions":[{"id":"https://openalex.org/I148099254","display_name":"National Chung Cheng University","ror":"https://ror.org/0028v3876","country_code":"TW","type":"education","lineage":["https://openalex.org/I148099254"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Ching-Che Chung","raw_affiliation_strings":["Department of Computer Science & Information Engineering, National Chung-Cheng University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science & Information Engineering, National Chung-Cheng University","institution_ids":["https://openalex.org/I148099254"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5004614343","display_name":"Chi-Kuang Lo","orcid":null},"institutions":[{"id":"https://openalex.org/I148099254","display_name":"National Chung Cheng University","ror":"https://ror.org/0028v3876","country_code":"TW","type":"education","lineage":["https://openalex.org/I148099254"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chi-Kuang Lo","raw_affiliation_strings":["Department of Computer Science & Information Engineering, National Chung-Cheng University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science & Information Engineering, National Chung-Cheng University","institution_ids":["https://openalex.org/I148099254"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I148099254"],"apc_list":null,"apc_paid":null,"fwci":0.2933,"has_fulltext":true,"cited_by_count":3,"citation_normalized_percentile":{"value":0.64652666,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"13","issue":"17","first_page":"20160749","last_page":"20160749"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.9103294610977173},{"id":"https://openalex.org/keywords/pll-multibit","display_name":"PLL multibit","score":0.6874551773071289},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6735895276069641},{"id":"https://openalex.org/keywords/lock","display_name":"Lock (firearm)","score":0.6712279319763184},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5766169428825378},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.547939658164978},{"id":"https://openalex.org/keywords/delay-locked-loop","display_name":"Delay-locked loop","score":0.5346628427505493},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.516751229763031},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.49548017978668213},{"id":"https://openalex.org/keywords/standby-power","display_name":"Standby power","score":0.4841040372848511},{"id":"https://openalex.org/keywords/loop","display_name":"Loop (graph theory)","score":0.47732359170913696},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.38730892539024353},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.36751365661621094},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3582594394683838},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.28099948167800903},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.20748302340507507},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.1693539321422577}],"concepts":[{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.9103294610977173},{"id":"https://openalex.org/C77881186","wikidata":"https://www.wikidata.org/wiki/Q7119642","display_name":"PLL multibit","level":4,"score":0.6874551773071289},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6735895276069641},{"id":"https://openalex.org/C174839445","wikidata":"https://www.wikidata.org/wiki/Q1134386","display_name":"Lock (firearm)","level":2,"score":0.6712279319763184},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5766169428825378},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.547939658164978},{"id":"https://openalex.org/C190462668","wikidata":"https://www.wikidata.org/wiki/Q492265","display_name":"Delay-locked loop","level":4,"score":0.5346628427505493},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.516751229763031},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.49548017978668213},{"id":"https://openalex.org/C7140552","wikidata":"https://www.wikidata.org/wiki/Q1366402","display_name":"Standby power","level":3,"score":0.4841040372848511},{"id":"https://openalex.org/C184670325","wikidata":"https://www.wikidata.org/wiki/Q512604","display_name":"Loop (graph theory)","level":2,"score":0.47732359170913696},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.38730892539024353},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.36751365661621094},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3582594394683838},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.28099948167800903},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.20748302340507507},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.1693539321422577},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1587/elex.13.20160749","is_oa":true,"landing_page_url":"https://doi.org/10.1587/elex.13.20160749","pdf_url":"https://www.jstage.jst.go.jp/article/elex/13/17/13_13.20160749/_pdf","source":{"id":"https://openalex.org/S207433681","display_name":"IEICE Electronics Express","issn_l":"1349-2543","issn":["1349-2543","1349-9467"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Electronics Express","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1587/elex.13.20160749","is_oa":true,"landing_page_url":"https://doi.org/10.1587/elex.13.20160749","pdf_url":"https://www.jstage.jst.go.jp/article/elex/13/17/13_13.20160749/_pdf","source":{"id":"https://openalex.org/S207433681","display_name":"IEICE Electronics Express","issn_l":"1349-2543","issn":["1349-2543","1349-9467"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Electronics Express","raw_type":"journal-article"},"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8899999856948853}],"awards":[{"id":"https://openalex.org/G4549449143","display_name":null,"funder_award_id":"063-MY3","funder_id":"https://openalex.org/F4320322795","funder_display_name":"Ministry of Science and Technology, Taiwan"},{"id":"https://openalex.org/G456520585","display_name":null,"funder_award_id":"MOST-103","funder_id":"https://openalex.org/F4320322795","funder_display_name":"Ministry of Science and Technology, Taiwan"}],"funders":[{"id":"https://openalex.org/F4320322795","display_name":"Ministry of Science and Technology, Taiwan","ror":"https://ror.org/02kv4zf79"}],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2509603387.pdf","grobid_xml":"https://content.openalex.org/works/W2509603387.grobid-xml"},"referenced_works_count":21,"referenced_works":["https://openalex.org/W1969826680","https://openalex.org/W1977430680","https://openalex.org/W2004688320","https://openalex.org/W2011931115","https://openalex.org/W2014421230","https://openalex.org/W2014849399","https://openalex.org/W2017690880","https://openalex.org/W2021980694","https://openalex.org/W2022847884","https://openalex.org/W2027788254","https://openalex.org/W2059166966","https://openalex.org/W2070384134","https://openalex.org/W2089684280","https://openalex.org/W2094813099","https://openalex.org/W2096549014","https://openalex.org/W2104845313","https://openalex.org/W2119080246","https://openalex.org/W2136750748","https://openalex.org/W2137120286","https://openalex.org/W2140798769","https://openalex.org/W2153743315"],"related_works":["https://openalex.org/W2401743820","https://openalex.org/W2354050524","https://openalex.org/W766471173","https://openalex.org/W2899616528","https://openalex.org/W4295813049","https://openalex.org/W2389594899","https://openalex.org/W1997845338","https://openalex.org/W2900271051","https://openalex.org/W2976219355","https://openalex.org/W2142978107"],"abstract_inverted_index":{"A":[0],"system-on-a-chip":[1],"(SoC)":[2],"requires":[3],"several":[4],"phase-locked":[5],"loops":[6],"(PLLs)":[7],"for":[8],"providing":[9],"different":[10,14],"clock":[11,52],"frequencies":[12],"to":[13,23,56,80],"modules.":[15],"Usually,":[16],"analog":[17],"PLLs":[18,30],"cannot":[19],"be":[20,61],"stopped":[21],"due":[22],"their":[24],"long":[25],"setting":[26],"time.":[27],"Hence,":[28],"these":[29],"dominate":[31],"the":[32,65,73,84],"system\u2019s":[33],"standby":[34],"power":[35,67,85],"consumption.":[36],"In":[37],"this":[38],"paper,":[39],"a":[40],"fast":[41],"lock-in":[42,49],"all-digital":[43],"PLL":[44],"(ADPLL)":[45],"that":[46,58],"can":[47,60],"achieve":[48],"within":[50],"4.5":[51],"cycles":[53],"is":[54,87],"proposed":[55,74],"ensure":[57],"it":[59],"switched":[62],"off":[63],"in":[64],"low":[66],"mode.":[68],"The":[69],"output":[70],"frequency":[71],"of":[72],"ADPLL":[75],"ranges":[76],"from":[77],"125":[78],"MHz":[79],"1.47":[81,93],"GHz,":[82],"and":[83],"consumption":[86],"0.98":[88],"mW":[89],"(at":[90],"0.9":[91],"V,":[92],"GHz).":[94]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":2}],"updated_date":"2026-08-09T07:27:16.801131","created_date":"2025-10-10T00:00:00"}