{"id":"https://openalex.org/W2472817444","doi":"https://doi.org/10.1587/elex.13.20160511","title":"Power-mode-aware buffer synthesis for low-power clock skew minimization","display_name":"Power-mode-aware buffer synthesis for low-power clock skew minimization","publication_year":2016,"publication_date":"2016-01-01","ids":{"openalex":"https://openalex.org/W2472817444","doi":"https://doi.org/10.1587/elex.13.20160511","mag":"2472817444"},"language":"en","primary_location":{"id":"doi:10.1587/elex.13.20160511","is_oa":true,"landing_page_url":"https://doi.org/10.1587/elex.13.20160511","pdf_url":"https://www.jstage.jst.go.jp/article/elex/13/14/13_13.20160511/_pdf","source":{"id":"https://openalex.org/S207433681","display_name":"IEICE Electronics Express","issn_l":"1349-2543","issn":["1349-2543","1349-9467"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Electronics Express","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"diamond","oa_url":"https://www.jstage.jst.go.jp/article/elex/13/14/13_13.20160511/_pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060945705","display_name":"Shih-Hsu Huang","orcid":"https://orcid.org/0000-0001-8908-8384"},"institutions":[{"id":"https://openalex.org/I151221077","display_name":"Chung Yuan Christian University","ror":"https://ror.org/02w8ws377","country_code":"TW","type":"education","lineage":["https://openalex.org/I151221077"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Shih-Hsu Huang","raw_affiliation_strings":["Department of Electronic Engineering, Chung Yuan Christian University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, Chung Yuan Christian University","institution_ids":["https://openalex.org/I151221077"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5059158206","display_name":"Chun-Hua Cheng","orcid":null},"institutions":[{"id":"https://openalex.org/I151221077","display_name":"Chung Yuan Christian University","ror":"https://ror.org/02w8ws377","country_code":"TW","type":"education","lineage":["https://openalex.org/I151221077"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chun-Hua Cheng","raw_affiliation_strings":["Department of Electronic Engineering, Chung Yuan Christian University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, Chung Yuan Christian University","institution_ids":["https://openalex.org/I151221077"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I151221077"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":0,"citation_normalized_percentile":{"value":0.06707317,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"13","issue":"14","first_page":"20160511","last_page":"20160511"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/clock-gating","display_name":"Clock gating","score":0.7448227405548096},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.6645628213882446},{"id":"https://openalex.org/keywords/clock-skew","display_name":"Clock skew","score":0.6360628604888916},{"id":"https://openalex.org/keywords/timing-failure","display_name":"Timing failure","score":0.6230872869491577},{"id":"https://openalex.org/keywords/skew","display_name":"Skew","score":0.6217297315597534},{"id":"https://openalex.org/keywords/digital-clock-manager","display_name":"Digital clock manager","score":0.5536224246025085},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5497562885284424},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5496814250946045},{"id":"https://openalex.org/keywords/dynamic-demand","display_name":"Dynamic demand","score":0.5173436999320984},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.47023245692253113},{"id":"https://openalex.org/keywords/clock-domain-crossing","display_name":"Clock domain crossing","score":0.4360063672065735},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4285038411617279},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.4153427481651306},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.3673841953277588},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20897626876831055},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.1893698275089264},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10280835628509521},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.08395957946777344}],"concepts":[{"id":"https://openalex.org/C22716491","wikidata":"https://www.wikidata.org/wiki/Q590170","display_name":"Clock gating","level":5,"score":0.7448227405548096},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.6645628213882446},{"id":"https://openalex.org/C60501442","wikidata":"https://www.wikidata.org/wiki/Q4382014","display_name":"Clock skew","level":4,"score":0.6360628604888916},{"id":"https://openalex.org/C104654189","wikidata":"https://www.wikidata.org/wiki/Q7806740","display_name":"Timing failure","level":5,"score":0.6230872869491577},{"id":"https://openalex.org/C43711488","wikidata":"https://www.wikidata.org/wiki/Q7534783","display_name":"Skew","level":2,"score":0.6217297315597534},{"id":"https://openalex.org/C113074038","wikidata":"https://www.wikidata.org/wiki/Q5276052","display_name":"Digital clock manager","level":5,"score":0.5536224246025085},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5497562885284424},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5496814250946045},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.5173436999320984},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.47023245692253113},{"id":"https://openalex.org/C127204226","wikidata":"https://www.wikidata.org/wiki/Q5134799","display_name":"Clock domain crossing","level":5,"score":0.4360063672065735},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4285038411617279},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.4153427481651306},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3673841953277588},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20897626876831055},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.1893698275089264},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10280835628509521},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.08395957946777344},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1587/elex.13.20160511","is_oa":true,"landing_page_url":"https://doi.org/10.1587/elex.13.20160511","pdf_url":"https://www.jstage.jst.go.jp/article/elex/13/14/13_13.20160511/_pdf","source":{"id":"https://openalex.org/S207433681","display_name":"IEICE Electronics Express","issn_l":"1349-2543","issn":["1349-2543","1349-9467"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Electronics Express","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1587/elex.13.20160511","is_oa":true,"landing_page_url":"https://doi.org/10.1587/elex.13.20160511","pdf_url":"https://www.jstage.jst.go.jp/article/elex/13/14/13_13.20160511/_pdf","source":{"id":"https://openalex.org/S207433681","display_name":"IEICE Electronics Express","issn_l":"1349-2543","issn":["1349-2543","1349-9467"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Electronics Express","raw_type":"journal-article"},"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8299999833106995,"id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G1757118360","display_name":"Timing and Power Optimization in Wide-Voltage-Range Multi-Power-Mode Designs","funder_award_id":"NSC102-2221-E033-064-MY3","funder_id":"https://openalex.org/F4320322795","funder_display_name":"Ministry of Science and Technology, Taiwan"},{"id":"https://openalex.org/G522915841","display_name":null,"funder_award_id":"102-2221","funder_id":"https://openalex.org/F4320322795","funder_display_name":"Ministry of Science and Technology, Taiwan"},{"id":"https://openalex.org/G6059720258","display_name":null,"funder_award_id":"MOST102\u2013","funder_id":"https://openalex.org/F4320322795","funder_display_name":"Ministry of Science and Technology, Taiwan"},{"id":"https://openalex.org/G613972104","display_name":null,"funder_award_id":"MOST 102-2221-E-033","funder_id":"https://openalex.org/F4320322795","funder_display_name":"Ministry of Science and Technology, Taiwan"}],"funders":[{"id":"https://openalex.org/F4320322795","display_name":"Ministry of Science and Technology, Taiwan","ror":"https://ror.org/02kv4zf79"}],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2472817444.pdf","grobid_xml":"https://content.openalex.org/works/W2472817444.grobid-xml"},"referenced_works_count":14,"referenced_works":["https://openalex.org/W118540524","https://openalex.org/W199061772","https://openalex.org/W1576861458","https://openalex.org/W1976634368","https://openalex.org/W1988593113","https://openalex.org/W2094278783","https://openalex.org/W2105471723","https://openalex.org/W2123408912","https://openalex.org/W2136964362","https://openalex.org/W2137861476","https://openalex.org/W2139937095","https://openalex.org/W2153785506","https://openalex.org/W3149731687","https://openalex.org/W4234214783"],"related_works":["https://openalex.org/W3006003651","https://openalex.org/W2088914741","https://openalex.org/W4247180033","https://openalex.org/W2133326759","https://openalex.org/W2040807843","https://openalex.org/W4249038728","https://openalex.org/W1564063853","https://openalex.org/W2559451387","https://openalex.org/W4230501858","https://openalex.org/W60672686"],"abstract_inverted_index":{"The":[0],"use":[1],"of":[2,17,39,61,138],"multiple":[3],"power":[4,33,69,91,108,136],"modes":[5],"is":[6],"an":[7],"effective":[8],"method":[9],"for":[10,26],"low":[11],"power.":[12],"In":[13,76],"the":[14,28,46,59,62,68,107,112,115,123,130],"clock":[15,29,55,64,84,117],"tree":[16],"a":[18,40,53,99],"multi-power-mode":[19],"design,":[20],"power-mode-aware":[21],"buffers":[22],"(PMABs)":[23],"are":[24,48],"used":[25],"removing":[27],"skew":[30],"in":[31,45,89],"different":[32,82,90],"modes.":[34],"For":[35],"each":[36],"voltage":[37],"mode":[38],"module,":[41],"its":[42],"corresponding":[43],"delays":[44],"PMABs":[47,113],"designed":[49],"to":[50,105],"align":[51],"with":[52,114,122],"global":[54,63,83,116],"latency":[56,65,85,118],"value.":[57],"However,":[58],"impact":[60],"value":[66,119],"on":[67,94],"consumption":[70,109,137],"has":[71],"not":[72],"been":[73],"well":[74],"studied.":[75],"this":[77,95],"paper,":[78],"we":[79,97],"demonstrate":[80],"that":[81,129],"values":[86],"may":[87],"result":[88],"consumptions.":[92],"Based":[93],"observation,":[96],"propose":[98],"mixed":[100],"integer":[101],"linear":[102],"programming":[103],"approach":[104,132],"minimize":[106],"by":[110],"synthesizing":[111],"considered.":[120],"Compared":[121],"previous":[124],"work,":[125],"benchmark":[126],"data":[127],"show":[128],"proposed":[131],"can":[133],"reduce":[134],"18.31%":[135],"PMABs.":[139]},"counts_by_year":[],"updated_date":"2026-08-06T08:24:18.245995","created_date":"2025-10-10T00:00:00"}