{"id":"https://openalex.org/W2016734546","doi":"https://doi.org/10.1587/elex.12.20150110","title":"New insights into the impact of SEUs in FPGA CRAMs","display_name":"New insights into the impact of SEUs in FPGA CRAMs","publication_year":2015,"publication_date":"2015-01-01","ids":{"openalex":"https://openalex.org/W2016734546","doi":"https://doi.org/10.1587/elex.12.20150110","mag":"2016734546"},"language":"en","primary_location":{"id":"doi:10.1587/elex.12.20150110","is_oa":true,"landing_page_url":"https://doi.org/10.1587/elex.12.20150110","pdf_url":"https://www.jstage.jst.go.jp/article/elex/12/6/12_12.20150110/_pdf","source":{"id":"https://openalex.org/S207433681","display_name":"IEICE Electronics Express","issn_l":"1349-2543","issn":["1349-2543","1349-9467"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Electronics Express","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"diamond","oa_url":"https://www.jstage.jst.go.jp/article/elex/12/6/12_12.20150110/_pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100371339","display_name":"Sheng Wang","orcid":"https://orcid.org/0009-0006-8750-0519"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Sheng Wang","raw_affiliation_strings":["ASIC and System State Key Lab, Fudan University"],"affiliations":[{"raw_affiliation_string":"ASIC and System State Key Lab, Fudan University","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028414036","display_name":"Adrian Evans","orcid":"https://orcid.org/0000-0002-2617-5007"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Adrian Evans","raw_affiliation_strings":["IROC Technologies"],"affiliations":[{"raw_affiliation_string":"IROC Technologies","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025156540","display_name":"Shi-Jie Wen","orcid":"https://orcid.org/0009-0002-7478-2351"},"institutions":[{"id":"https://openalex.org/I135428043","display_name":"Cisco Systems (United States)","ror":"https://ror.org/03yt1ez60","country_code":"US","type":"company","lineage":["https://openalex.org/I135428043"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shi-Jie Wen","raw_affiliation_strings":["Cisco Systems"],"affiliations":[{"raw_affiliation_string":"Cisco Systems","institution_ids":["https://openalex.org/I135428043"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111711578","display_name":"Rick Wong","orcid":null},"institutions":[{"id":"https://openalex.org/I135428043","display_name":"Cisco Systems (United States)","ror":"https://ror.org/03yt1ez60","country_code":"US","type":"company","lineage":["https://openalex.org/I135428043"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Rick Wong","raw_affiliation_strings":["Cisco Systems"],"affiliations":[{"raw_affiliation_string":"Cisco Systems","institution_ids":["https://openalex.org/I135428043"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5091215988","display_name":"Geng-Sheng Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"GengSheng Chen","raw_affiliation_strings":["ASIC and System State Key Lab, Fudan University"],"affiliations":[{"raw_affiliation_string":"ASIC and System State Key Lab, Fudan University","institution_ids":["https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5100371339"],"corresponding_institution_ids":["https://openalex.org/I24943067"],"apc_list":null,"apc_paid":null,"fwci":0.30063281,"has_fulltext":true,"cited_by_count":1,"citation_normalized_percentile":{"value":0.61936505,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"12","issue":"6","first_page":"20150110","last_page":"20150110"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/emulation","display_name":"Emulation","score":0.8288577795028687},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.8184521198272705},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7387241125106812},{"id":"https://openalex.org/keywords/data-scrubbing","display_name":"Data scrubbing","score":0.6922528147697449},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6701140999794006},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6610778570175171},{"id":"https://openalex.org/keywords/criticality","display_name":"Criticality","score":0.46317675709724426},{"id":"https://openalex.org/keywords/fault-injection","display_name":"Fault injection","score":0.4530884027481079},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.42930272221565247},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.34932225942611694},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2341063916683197},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.13600748777389526},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.06727471947669983}],"concepts":[{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.8288577795028687},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.8184521198272705},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7387241125106812},{"id":"https://openalex.org/C89529581","wikidata":"https://www.wikidata.org/wiki/Q5227348","display_name":"Data scrubbing","level":2,"score":0.6922528147697449},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6701140999794006},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6610778570175171},{"id":"https://openalex.org/C125611927","wikidata":"https://www.wikidata.org/wiki/Q17008131","display_name":"Criticality","level":2,"score":0.46317675709724426},{"id":"https://openalex.org/C2775928411","wikidata":"https://www.wikidata.org/wiki/Q2041312","display_name":"Fault injection","level":3,"score":0.4530884027481079},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.42930272221565247},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.34932225942611694},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2341063916683197},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.13600748777389526},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.06727471947669983},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0},{"id":"https://openalex.org/C185544564","wikidata":"https://www.wikidata.org/wiki/Q81197","display_name":"Nuclear physics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1587/elex.12.20150110","is_oa":true,"landing_page_url":"https://doi.org/10.1587/elex.12.20150110","pdf_url":"https://www.jstage.jst.go.jp/article/elex/12/6/12_12.20150110/_pdf","source":{"id":"https://openalex.org/S207433681","display_name":"IEICE Electronics Express","issn_l":"1349-2543","issn":["1349-2543","1349-9467"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Electronics Express","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1587/elex.12.20150110","is_oa":true,"landing_page_url":"https://doi.org/10.1587/elex.12.20150110","pdf_url":"https://www.jstage.jst.go.jp/article/elex/12/6/12_12.20150110/_pdf","source":{"id":"https://openalex.org/S207433681","display_name":"IEICE Electronics Express","issn_l":"1349-2543","issn":["1349-2543","1349-9467"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Electronics Express","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320307791","display_name":"Cisco Systems","ror":"https://ror.org/03yt1ez60"}],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2016734546.pdf","grobid_xml":"https://content.openalex.org/works/W2016734546.grobid-xml"},"referenced_works_count":10,"referenced_works":["https://openalex.org/W2003145829","https://openalex.org/W2011601898","https://openalex.org/W2044082388","https://openalex.org/W2067330160","https://openalex.org/W2115071828","https://openalex.org/W2122512228","https://openalex.org/W2124188577","https://openalex.org/W2130146997","https://openalex.org/W2132454133","https://openalex.org/W2275083152"],"related_works":["https://openalex.org/W2145233434","https://openalex.org/W2291587020","https://openalex.org/W2111105659","https://openalex.org/W3006277082","https://openalex.org/W2118560622","https://openalex.org/W2610634993","https://openalex.org/W2062623691","https://openalex.org/W2159677757","https://openalex.org/W2097660413","https://openalex.org/W2081738003"],"abstract_inverted_index":{"This":[0,39],"paper":[1],"presents":[2],"a":[3,30],"detailed":[4],"study":[5],"of":[6,9,16,27,59,71,90],"the":[7,12,28,69,72,75,79,87],"impact":[8],"SEUs":[10],"in":[11,45],"configuration":[13],"RAM":[14],"(CRAM)":[15],"SRAM":[17,22],"based":[18,23,64],"FPGAs.":[19],"Since":[20],"modern":[21],"FPGAs":[24],"support":[25],"scrubbing":[26,92],"CRAM,":[29],"new,":[31],"intermittent":[32],"CRAM":[33,60,91],"SEU":[34],"fault":[35,40],"model":[36,41],"is":[37,42,62],"presented.":[38],"implemented":[43],"both":[44],"simulation":[46],"and":[47,74],"on":[48,65,78],"an":[49,53],"emulation":[50],"platform":[51],"for":[52],"embedded":[54],"processor":[55],"design.":[56],"The":[57],"criticality":[58],"bits":[61],"studied":[63],"their":[66],"logic":[67],"function,":[68],"duration":[70],"SEU,":[73],"workload":[76],"running":[77],"processor.":[80],"These":[81],"results":[82],"provide":[83],"new":[84],"insight":[85],"into":[86],"overall":[88],"effectiveness":[89],"mechanisms.":[93]},"counts_by_year":[{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}