{"id":"https://openalex.org/W2091771191","doi":"https://doi.org/10.1587/elex.11.20140454","title":"A fast low power window-opening logic for high speed SAR ADC","display_name":"A fast low power window-opening logic for high speed SAR ADC","publication_year":2014,"publication_date":"2014-01-01","ids":{"openalex":"https://openalex.org/W2091771191","doi":"https://doi.org/10.1587/elex.11.20140454","mag":"2091771191"},"language":"en","primary_location":{"id":"doi:10.1587/elex.11.20140454","is_oa":true,"landing_page_url":"https://doi.org/10.1587/elex.11.20140454","pdf_url":"https://www.jstage.jst.go.jp/article/elex/11/14/11_11.20140454/_pdf","source":{"id":"https://openalex.org/S207433681","display_name":"IEICE Electronics Express","issn_l":"1349-2543","issn":["1349-2543","1349-9467"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Electronics Express","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"diamond","oa_url":"https://www.jstage.jst.go.jp/article/elex/11/14/11_11.20140454/_pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101185585","display_name":"Yuxiao Lu","orcid":null},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Yuxiao Lu","raw_affiliation_strings":["School of Microelectronics, Shanghai Jiao Tong University","School of Microelectronics, Shanghai Jiao Tong University#TAB#"],"affiliations":[{"raw_affiliation_string":"School of Microelectronics, Shanghai Jiao Tong University","institution_ids":["https://openalex.org/I183067930"]},{"raw_affiliation_string":"School of Microelectronics, Shanghai Jiao Tong University#TAB#","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027987774","display_name":"Chaojie Fan","orcid":null},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Chaojie Fan","raw_affiliation_strings":["School of Microelectronics, Shanghai Jiao Tong University","School of Microelectronics, Shanghai Jiao Tong University#TAB#"],"affiliations":[{"raw_affiliation_string":"School of Microelectronics, Shanghai Jiao Tong University","institution_ids":["https://openalex.org/I183067930"]},{"raw_affiliation_string":"School of Microelectronics, Shanghai Jiao Tong University#TAB#","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5061906127","display_name":"Lu Sun","orcid":"https://orcid.org/0000-0002-3410-9771"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Lu Sun","raw_affiliation_strings":["School of Microelectronics, Shanghai Jiao Tong University","School of Microelectronics, Shanghai Jiao Tong University#TAB#"],"affiliations":[{"raw_affiliation_string":"School of Microelectronics, Shanghai Jiao Tong University","institution_ids":["https://openalex.org/I183067930"]},{"raw_affiliation_string":"School of Microelectronics, Shanghai Jiao Tong University#TAB#","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100356712","display_name":"Zhe Li","orcid":"https://orcid.org/0000-0003-3738-4418"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhe Li","raw_affiliation_strings":["School of Microelectronics, Shanghai Jiao Tong University","School of Microelectronics, Shanghai Jiao Tong University#TAB#"],"affiliations":[{"raw_affiliation_string":"School of Microelectronics, Shanghai Jiao Tong University","institution_ids":["https://openalex.org/I183067930"]},{"raw_affiliation_string":"School of Microelectronics, Shanghai Jiao Tong University#TAB#","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5091076746","display_name":"Jianjun Zhou","orcid":"https://orcid.org/0000-0001-9898-7285"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jianjun Zhou","raw_affiliation_strings":["School of Microelectronics, Shanghai Jiao Tong University","School of Microelectronics, Shanghai Jiao Tong University#TAB#"],"affiliations":[{"raw_affiliation_string":"School of Microelectronics, Shanghai Jiao Tong University","institution_ids":["https://openalex.org/I183067930"]},{"raw_affiliation_string":"School of Microelectronics, Shanghai Jiao Tong University#TAB#","institution_ids":["https://openalex.org/I183067930"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5101185585"],"corresponding_institution_ids":["https://openalex.org/I183067930"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":2,"citation_normalized_percentile":{"value":0.12814297,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":95},"biblio":{"volume":"11","issue":"14","first_page":"20140454","last_page":"20140454"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/successive-approximation-adc","display_name":"Successive approximation ADC","score":0.9344736337661743},{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.9067482948303223},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6549214124679565},{"id":"https://openalex.org/keywords/domino-logic","display_name":"Domino logic","score":0.6437134742736816},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5543349981307983},{"id":"https://openalex.org/keywords/window","display_name":"Window (computing)","score":0.5167009830474854},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5156797170639038},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4841678738594055},{"id":"https://openalex.org/keywords/logic-level","display_name":"Logic level","score":0.4430379271507263},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.41429752111434937},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.41429033875465393},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3952023386955261},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.36866581439971924},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.33055394887924194},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.32625800371170044},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2671993672847748},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.21696320176124573},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19890165328979492},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.17807120084762573},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.1715593934059143},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.09137243032455444}],"concepts":[{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.9344736337661743},{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.9067482948303223},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6549214124679565},{"id":"https://openalex.org/C2777555262","wikidata":"https://www.wikidata.org/wiki/Q173391","display_name":"Domino logic","level":5,"score":0.6437134742736816},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5543349981307983},{"id":"https://openalex.org/C2778751112","wikidata":"https://www.wikidata.org/wiki/Q835016","display_name":"Window (computing)","level":2,"score":0.5167009830474854},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5156797170639038},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4841678738594055},{"id":"https://openalex.org/C146569638","wikidata":"https://www.wikidata.org/wiki/Q173378","display_name":"Logic level","level":3,"score":0.4430379271507263},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.41429752111434937},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.41429033875465393},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3952023386955261},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.36866581439971924},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.33055394887924194},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.32625800371170044},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2671993672847748},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.21696320176124573},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19890165328979492},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.17807120084762573},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.1715593934059143},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.09137243032455444},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1587/elex.11.20140454","is_oa":true,"landing_page_url":"https://doi.org/10.1587/elex.11.20140454","pdf_url":"https://www.jstage.jst.go.jp/article/elex/11/14/11_11.20140454/_pdf","source":{"id":"https://openalex.org/S207433681","display_name":"IEICE Electronics Express","issn_l":"1349-2543","issn":["1349-2543","1349-9467"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Electronics Express","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1587/elex.11.20140454","is_oa":true,"landing_page_url":"https://doi.org/10.1587/elex.11.20140454","pdf_url":"https://www.jstage.jst.go.jp/article/elex/11/14/11_11.20140454/_pdf","source":{"id":"https://openalex.org/S207433681","display_name":"IEICE Electronics Express","issn_l":"1349-2543","issn":["1349-2543","1349-9467"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Electronics Express","raw_type":"journal-article"},"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8399999737739563,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2091771191.pdf","grobid_xml":"https://content.openalex.org/works/W2091771191.grobid-xml"},"referenced_works_count":5,"referenced_works":["https://openalex.org/W2005378264","https://openalex.org/W2053451635","https://openalex.org/W2127384894","https://openalex.org/W2146977045","https://openalex.org/W2147723118"],"related_works":["https://openalex.org/W2118487491","https://openalex.org/W2594780754","https://openalex.org/W2155174752","https://openalex.org/W2740419683","https://openalex.org/W2158157809","https://openalex.org/W2611387041","https://openalex.org/W321873635","https://openalex.org/W1601832081","https://openalex.org/W2135311156","https://openalex.org/W2127151832"],"abstract_inverted_index":{"A":[0],"new":[1,75],"window-opening":[2,32],"low-power":[3],"area-efficient":[4],"switching":[5],"logic":[6,25,76,79],"for":[7,55],"high":[8],"speed":[9],"successive":[10],"approximation":[11],"register":[12],"(SAR)":[13],"analog-to-digital":[14],"converter":[15],"(ADC)":[16],"is":[17,89],"proposed":[18],"in":[19,61],"this":[20],"paper.":[21],"Unlike":[22],"conventional":[23],"SAR":[24,71,94],"based":[26],"on":[27],"the":[28,31,35,39,52,74],"shift":[29],"register,":[30],"scheme":[33],"minimizes":[34],"delay":[36,80],"by":[37],"putting":[38],"comparator":[40],"results":[41],"almost":[42],"directly":[43],"to":[44,50,58],"DAC,":[45],"and":[46],"utilizes":[47],"domino-based":[48],"structure":[49],"reduce":[51],"capacitive":[53],"load":[54],"comparator.":[56],"According":[57],"pre-layout":[59],"simulation":[60],"65":[62],"nm":[63],"CMOS":[64],"technology,":[65],"a":[66,78],"10":[67],"bit":[68],"100":[69],"MS/s":[70],"ADC":[72],"with":[73],"achieves":[77],"of":[81],"73":[82],"ps":[83],"including":[84],"DAC":[85],"buffer":[86],"delay,":[87],"which":[88],"much":[90],"lower":[91],"than":[92],"most":[93],"ADC.":[95]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2018,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}