{"id":"https://openalex.org/W2060418896","doi":"https://doi.org/10.1587/elex.10.20130905","title":"A scalable, fixed-shuffling, parallel FFT butterfly processing architecture for SDR environment","display_name":"A scalable, fixed-shuffling, parallel FFT butterfly processing architecture for SDR environment","publication_year":2013,"publication_date":"2013-12-25","ids":{"openalex":"https://openalex.org/W2060418896","doi":"https://doi.org/10.1587/elex.10.20130905","mag":"2060418896"},"language":"en","primary_location":{"id":"doi:10.1587/elex.10.20130905","is_oa":true,"landing_page_url":"https://doi.org/10.1587/elex.10.20130905","pdf_url":"https://www.jstage.jst.go.jp/article/elex/11/2/11_10.20130905/_pdf","source":{"id":"https://openalex.org/S207433681","display_name":"IEICE Electronics Express","issn_l":"1349-2543","issn":["1349-2543","1349-9467"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Electronics Express","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"bronze","oa_url":"https://www.jstage.jst.go.jp/article/elex/11/2/11_10.20130905/_pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100443213","display_name":"Ting Chen","orcid":"https://orcid.org/0000-0003-1790-2572"},"institutions":[{"id":"https://openalex.org/I170215575","display_name":"National University of Defense Technology","ror":"https://ror.org/05d2yfz11","country_code":"CN","type":"education","lineage":["https://openalex.org/I170215575"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ting Chen","raw_affiliation_strings":["College of Computer, National University of Defense Technology","College of Computer, National University of Defense Technology#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"College of Computer, National University of Defense Technology","institution_ids":["https://openalex.org/I170215575"]},{"raw_affiliation_string":"College of Computer, National University of Defense Technology#TAB#","institution_ids":["https://openalex.org/I170215575"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5057739949","display_name":"Hengzhu Liu","orcid":"https://orcid.org/0000-0003-4912-0364"},"institutions":[{"id":"https://openalex.org/I170215575","display_name":"National University of Defense Technology","ror":"https://ror.org/05d2yfz11","country_code":"CN","type":"education","lineage":["https://openalex.org/I170215575"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Hengzhu Liu","raw_affiliation_strings":["College of Computer, National University of Defense Technology","College of Computer, National University of Defense Technology#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"College of Computer, National University of Defense Technology","institution_ids":["https://openalex.org/I170215575"]},{"raw_affiliation_string":"College of Computer, National University of Defense Technology#TAB#","institution_ids":["https://openalex.org/I170215575"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100666358","display_name":"Botao Zhang","orcid":"https://orcid.org/0000-0001-7545-1218"},"institutions":[{"id":"https://openalex.org/I170215575","display_name":"National University of Defense Technology","ror":"https://ror.org/05d2yfz11","country_code":"CN","type":"education","lineage":["https://openalex.org/I170215575"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Botao Zhang","raw_affiliation_strings":["College of Computer, National University of Defense Technology","College of Computer, National University of Defense Technology#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"College of Computer, National University of Defense Technology","institution_ids":["https://openalex.org/I170215575"]},{"raw_affiliation_string":"College of Computer, National University of Defense Technology#TAB#","institution_ids":["https://openalex.org/I170215575"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I170215575"],"apc_list":null,"apc_paid":null,"fwci":0.5034,"has_fulltext":true,"cited_by_count":1,"citation_normalized_percentile":{"value":0.7174645,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"11","issue":"2","first_page":"20130905","last_page":"20130905"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/fast-fourier-transform","display_name":"Fast Fourier transform","score":0.7839430570602417},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7829277515411377},{"id":"https://openalex.org/keywords/simd","display_name":"SIMD","score":0.7630329132080078},{"id":"https://openalex.org/keywords/shuffling","display_name":"Shuffling","score":0.7138246893882751},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6490076780319214},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5938641428947449},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.5491724610328674},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.405534952878952},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.32334840297698975},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.1849551796913147}],"concepts":[{"id":"https://openalex.org/C75172450","wikidata":"https://www.wikidata.org/wiki/Q623950","display_name":"Fast Fourier transform","level":2,"score":0.7839430570602417},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7829277515411377},{"id":"https://openalex.org/C150552126","wikidata":"https://www.wikidata.org/wiki/Q339387","display_name":"SIMD","level":2,"score":0.7630329132080078},{"id":"https://openalex.org/C167927819","wikidata":"https://www.wikidata.org/wiki/Q1930567","display_name":"Shuffling","level":2,"score":0.7138246893882751},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6490076780319214},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5938641428947449},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.5491724610328674},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.405534952878952},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.32334840297698975},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.1849551796913147},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1587/elex.10.20130905","is_oa":true,"landing_page_url":"https://doi.org/10.1587/elex.10.20130905","pdf_url":"https://www.jstage.jst.go.jp/article/elex/11/2/11_10.20130905/_pdf","source":{"id":"https://openalex.org/S207433681","display_name":"IEICE Electronics Express","issn_l":"1349-2543","issn":["1349-2543","1349-9467"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Electronics Express","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1587/elex.10.20130905","is_oa":true,"landing_page_url":"https://doi.org/10.1587/elex.10.20130905","pdf_url":"https://www.jstage.jst.go.jp/article/elex/11/2/11_10.20130905/_pdf","source":{"id":"https://openalex.org/S207433681","display_name":"IEICE Electronics Express","issn_l":"1349-2543","issn":["1349-2543","1349-9467"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Electronics Express","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2060418896.pdf","grobid_xml":"https://content.openalex.org/works/W2060418896.grobid-xml"},"referenced_works_count":4,"referenced_works":["https://openalex.org/W1984448098","https://openalex.org/W2108410591","https://openalex.org/W2144760207","https://openalex.org/W2166577902"],"related_works":["https://openalex.org/W2566467770","https://openalex.org/W1536455114","https://openalex.org/W2994245508","https://openalex.org/W4242172182","https://openalex.org/W2082875307","https://openalex.org/W4237780868","https://openalex.org/W4285302443","https://openalex.org/W4387490584","https://openalex.org/W1998013902","https://openalex.org/W2019451907"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,60],"programmable":[4],"and":[5,71,90],"high-efficient":[6],"application":[7],"specific":[8],"instruction-set":[9],"processor":[10],"(ASIP)":[11],"for":[12],"fast":[13],"Fourier":[14],"transformation":[15],"(FFT)":[16],"processing":[17],"based":[18],"on":[19],"software":[20],"defined":[21],"radio":[22],"(SDR)":[23],"methodology.":[24],"It":[25],"adopts":[26],"single":[27],"instruction":[28],"multiple":[29],"data":[30,55],"(SIMD)":[31],"architecture":[32],"to":[33,68],"exploit":[34],"the":[35,79],"parallelism":[36],"of":[37,98],"butterfly":[38,50],"operations":[39],"in":[40,96],"FFT":[41,81,93],"algorithm.":[42],"The":[43],"proposed":[44,67,80],"ASIP":[45,82,94],"features":[46],"eight":[47],"parallel":[48],"radix-2":[49],"computations":[51],"with":[52],"fixed":[53],"vector":[54,62],"shuffling":[56],"pattern.":[57],"In":[58],"addition,":[59],"flexible":[61,86],"address":[63],"generation":[64],"unit":[65],"is":[66,83],"support":[69],"inner-":[70],"inter-group":[72],"addressing":[73],"mode.":[74],"Experiment":[75],"results":[76],"show":[77],"that":[78],"much":[84],"more":[85],"than":[87],"previous":[88],"works":[89],"outperforms":[91],"state-of-the-art":[92],"architectures":[95],"term":[97],"energy-efficiency.":[99]},"counts_by_year":[{"year":2016,"cited_by_count":1}],"updated_date":"2026-08-05T07:39:15.569665","created_date":"2025-10-10T00:00:00"}