{"id":"https://openalex.org/W2043352873","doi":"https://doi.org/10.1587/elex.10.20130467","title":"Memory management for dual-addressing memory architecture","display_name":"Memory management for dual-addressing memory architecture","publication_year":2013,"publication_date":"2013-01-01","ids":{"openalex":"https://openalex.org/W2043352873","doi":"https://doi.org/10.1587/elex.10.20130467","mag":"2043352873"},"language":"en","primary_location":{"id":"doi:10.1587/elex.10.20130467","is_oa":true,"landing_page_url":"https://doi.org/10.1587/elex.10.20130467","pdf_url":"https://www.jstage.jst.go.jp/article/elex/10/15/10_10.20130467/_pdf","source":{"id":"https://openalex.org/S207433681","display_name":"IEICE Electronics Express","issn_l":"1349-2543","issn":["1349-2543","1349-9467"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Electronics Express","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"bronze","oa_url":"https://www.jstage.jst.go.jp/article/elex/10/15/10_10.20130467/_pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5020371352","display_name":"Ting-Wei Hung","orcid":null},"institutions":[{"id":"https://openalex.org/I99908691","display_name":"Yuan Ze University","ror":"https://ror.org/01fv1ds98","country_code":"TW","type":"education","lineage":["https://openalex.org/I99908691"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Ting-Wei Hung","raw_affiliation_strings":["Department of Computer Science and Engineering, Yuan Ze University"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Yuan Ze University","institution_ids":["https://openalex.org/I99908691"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101535357","display_name":"Yen-Hao Chen","orcid":"https://orcid.org/0000-0002-5456-8393"},"institutions":[{"id":"https://openalex.org/I99908691","display_name":"Yuan Ze University","ror":"https://ror.org/01fv1ds98","country_code":"TW","type":"education","lineage":["https://openalex.org/I99908691"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yen-Hao Chen","raw_affiliation_strings":["Department of Computer Science and Engineering, Yuan Ze University"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Yuan Ze University","institution_ids":["https://openalex.org/I99908691"]}]},{"author_position":"last","author":{"id":null,"display_name":"Yi-Yu Liu","orcid":null},"institutions":[{"id":"https://openalex.org/I99908691","display_name":"Yuan Ze University","ror":"https://ror.org/01fv1ds98","country_code":"TW","type":"education","lineage":["https://openalex.org/I99908691"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yi-Yu Liu","raw_affiliation_strings":["Department of Computer Science and Engineering, Yuan Ze University"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Yuan Ze University","institution_ids":["https://openalex.org/I99908691"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5020371352"],"corresponding_institution_ids":["https://openalex.org/I99908691"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":0,"citation_normalized_percentile":{"value":0.11040303,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"10","issue":"15","first_page":"20130467","last_page":"20130467"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7572965621948242},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.7226763367652893},{"id":"https://openalex.org/keywords/flat-memory-model","display_name":"Flat memory model","score":0.6953111290931702},{"id":"https://openalex.org/keywords/memory-map","display_name":"Memory map","score":0.6924364566802979},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.6617314219474792},{"id":"https://openalex.org/keywords/registered-memory","display_name":"Registered memory","score":0.6507939100265503},{"id":"https://openalex.org/keywords/physical-address","display_name":"Physical address","score":0.645577609539032},{"id":"https://openalex.org/keywords/memory-protection","display_name":"Memory protection","score":0.6026095747947693},{"id":"https://openalex.org/keywords/uniform-memory-access","display_name":"Uniform memory access","score":0.5689781308174133},{"id":"https://openalex.org/keywords/cache-only-memory-architecture","display_name":"Cache-only memory architecture","score":0.5590029954910278},{"id":"https://openalex.org/keywords/virtual-memory","display_name":"Virtual memory","score":0.5477310419082642},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.5324203968048096},{"id":"https://openalex.org/keywords/dual","display_name":"Dual (grammatical number)","score":0.5210666060447693},{"id":"https://openalex.org/keywords/computer-memory","display_name":"Computer memory","score":0.4985392093658447},{"id":"https://openalex.org/keywords/extended-memory","display_name":"Extended memory","score":0.495295912027359},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4787023365497589},{"id":"https://openalex.org/keywords/memory-refresh","display_name":"Memory refresh","score":0.4602263569831848},{"id":"https://openalex.org/keywords/distributed-shared-memory","display_name":"Distributed shared memory","score":0.45229068398475647},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4501877725124359},{"id":"https://openalex.org/keywords/memory-architecture","display_name":"Memory architecture","score":0.44698217511177063},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.35488247871398926},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.29647141695022583}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7572965621948242},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.7226763367652893},{"id":"https://openalex.org/C57863822","wikidata":"https://www.wikidata.org/wiki/Q905488","display_name":"Flat memory model","level":4,"score":0.6953111290931702},{"id":"https://openalex.org/C74426580","wikidata":"https://www.wikidata.org/wiki/Q719484","display_name":"Memory map","level":3,"score":0.6924364566802979},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.6617314219474792},{"id":"https://openalex.org/C93446704","wikidata":"https://www.wikidata.org/wiki/Q449328","display_name":"Registered memory","level":3,"score":0.6507939100265503},{"id":"https://openalex.org/C41036726","wikidata":"https://www.wikidata.org/wiki/Q844824","display_name":"Physical address","level":3,"score":0.645577609539032},{"id":"https://openalex.org/C18131444","wikidata":"https://www.wikidata.org/wiki/Q163585","display_name":"Memory protection","level":5,"score":0.6026095747947693},{"id":"https://openalex.org/C51290061","wikidata":"https://www.wikidata.org/wiki/Q1936765","display_name":"Uniform memory access","level":4,"score":0.5689781308174133},{"id":"https://openalex.org/C3720319","wikidata":"https://www.wikidata.org/wiki/Q5015937","display_name":"Cache-only memory architecture","level":5,"score":0.5590029954910278},{"id":"https://openalex.org/C76399640","wikidata":"https://www.wikidata.org/wiki/Q189401","display_name":"Virtual memory","level":4,"score":0.5477310419082642},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.5324203968048096},{"id":"https://openalex.org/C2780980858","wikidata":"https://www.wikidata.org/wiki/Q110022","display_name":"Dual (grammatical number)","level":2,"score":0.5210666060447693},{"id":"https://openalex.org/C92855701","wikidata":"https://www.wikidata.org/wiki/Q5830907","display_name":"Computer memory","level":3,"score":0.4985392093658447},{"id":"https://openalex.org/C171675096","wikidata":"https://www.wikidata.org/wiki/Q1143380","display_name":"Extended memory","level":4,"score":0.495295912027359},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4787023365497589},{"id":"https://openalex.org/C87907426","wikidata":"https://www.wikidata.org/wiki/Q6815755","display_name":"Memory refresh","level":4,"score":0.4602263569831848},{"id":"https://openalex.org/C39528615","wikidata":"https://www.wikidata.org/wiki/Q1229610","display_name":"Distributed shared memory","level":5,"score":0.45229068398475647},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4501877725124359},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.44698217511177063},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.35488247871398926},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.29647141695022583},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C124952713","wikidata":"https://www.wikidata.org/wiki/Q8242","display_name":"Literature","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1587/elex.10.20130467","is_oa":true,"landing_page_url":"https://doi.org/10.1587/elex.10.20130467","pdf_url":"https://www.jstage.jst.go.jp/article/elex/10/15/10_10.20130467/_pdf","source":{"id":"https://openalex.org/S207433681","display_name":"IEICE Electronics Express","issn_l":"1349-2543","issn":["1349-2543","1349-9467"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Electronics Express","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1587/elex.10.20130467","is_oa":true,"landing_page_url":"https://doi.org/10.1587/elex.10.20130467","pdf_url":"https://www.jstage.jst.go.jp/article/elex/10/15/10_10.20130467/_pdf","source":{"id":"https://openalex.org/S207433681","display_name":"IEICE Electronics Express","issn_l":"1349-2543","issn":["1349-2543","1349-9467"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4320800604","host_organization_name":"Institute of Electronics, Information and Communication Engineers","host_organization_lineage":["https://openalex.org/P4320800604"],"host_organization_lineage_names":["Institute of Electronics, Information and Communication Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEICE Electronics Express","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320321040","display_name":"National Science Council","ror":"https://ror.org/02kv4zf79"}],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2043352873.pdf","grobid_xml":"https://content.openalex.org/works/W2043352873.grobid-xml"},"referenced_works_count":7,"referenced_works":["https://openalex.org/W581518716","https://openalex.org/W1515422725","https://openalex.org/W1518236483","https://openalex.org/W1567646530","https://openalex.org/W2057830845","https://openalex.org/W3151741126","https://openalex.org/W3152703111"],"related_works":["https://openalex.org/W2138847","https://openalex.org/W4243333834","https://openalex.org/W2811195737","https://openalex.org/W1584308544","https://openalex.org/W2501039532","https://openalex.org/W2043352873","https://openalex.org/W2047684617","https://openalex.org/W1959889508","https://openalex.org/W2168550483","https://openalex.org/W3213903995"],"abstract_inverted_index":{"Dual-addressing":[0],"memory":[1,7,21,38,42,73,82],"architecture":[2],"is":[3],"designed":[4],"for":[5],"two-dimensional":[6],"access":[8],"with":[9,51],"both":[10],"row-major":[11],"and":[12,58],"column-major":[13],"localities.":[14],"In":[15],"this":[16],"paper,":[17],"we":[18,33,61,76],"highlight":[19],"two":[20],"management":[22,43,74],"issues":[23],"in":[24],"dual-addressing":[25,37,59,85],"memory.":[26,86],"First,":[27],"to":[28,40,49],"avoid":[29],"the":[30,52,71,81],"external":[31],"fragmentation,":[32],"propose":[34],"a":[35],"virtual":[36],"design":[39],"enable":[41],"via":[44],"operating":[45],"system.":[46],"After":[47],"that,":[48],"deal":[50],"size":[53],"mismatch":[54],"between":[55],"user-defined":[56],"data":[57,63,68],"memory,":[60],"discuss":[62],"arrangement":[64],"policies":[65],"at":[66],"different":[67],"granularity.":[69],"With":[70],"proposed":[72],"techniques,":[75],"are":[77],"capable":[78],"of":[79,84],"maximizing":[80],"utilization":[83]},"counts_by_year":[],"updated_date":"2026-04-21T08:09:41.155169","created_date":"2025-10-10T00:00:00"}
