{"id":"https://openalex.org/W4387619780","doi":"https://doi.org/10.15439/2023f592","title":"Path Length-Driven Hypergraph Partitioning: An Integer Programming Approach","display_name":"Path Length-Driven Hypergraph Partitioning: An Integer Programming Approach","publication_year":2023,"publication_date":"2023-09-26","ids":{"openalex":"https://openalex.org/W4387619780","doi":"https://doi.org/10.15439/2023f592"},"language":"en","primary_location":{"id":"doi:10.15439/2023f592","is_oa":true,"landing_page_url":"http://dx.doi.org/10.15439/2023f592","pdf_url":"https://annals-csis.org/proceedings/2023/drp/pdf/592.pdf","source":{"id":"https://openalex.org/S4220651875","display_name":"Annals of Computer Science and Information Systems","issn_l":"2300-5963","issn":["2300-5963"],"is_oa":true,"is_in_doaj":true,"is_core":false,"host_organization":"https://openalex.org/P4310317484","host_organization_name":"Polskie Towarzystwo Informatyczne","host_organization_lineage":["https://openalex.org/P4310317484"],"host_organization_lineage_names":["Polskie Towarzystwo Informatyczne"],"type":"conference"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Annals of Computer Science and Information Systems","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"diamond","oa_url":"https://annals-csis.org/proceedings/2023/drp/pdf/592.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5035163881","display_name":"Julien Rodriguez","orcid":"https://orcid.org/0000-0003-3583-0859"},"institutions":[{"id":"https://openalex.org/I1326498283","display_name":"Institut national de recherche en sciences et technologies du num\u00e9rique","ror":"https://ror.org/02kvxyf05","country_code":"FR","type":"government","lineage":["https://openalex.org/I1326498283"]},{"id":"https://openalex.org/I15057530","display_name":"Universit\u00e9 de Bordeaux","ror":"https://ror.org/057qpr032","country_code":"FR","type":"education","lineage":["https://openalex.org/I15057530"]},{"id":"https://openalex.org/I2738703131","display_name":"Commissariat \u00e0 l'\u00c9nergie Atomique et aux \u00c9nergies Alternatives","ror":"https://ror.org/00jjx8s55","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131"]},{"id":"https://openalex.org/I4210085861","display_name":"Laboratoire d'Int\u00e9gration des Syst\u00e8mes et des Technologies","ror":"https://ror.org/000dbcc61","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131","https://openalex.org/I2738703131","https://openalex.org/I277688954","https://openalex.org/I4210085861","https://openalex.org/I4210117989"]},{"id":"https://openalex.org/I4210142254","display_name":"Laboratoire Bordelais de Recherche en Informatique","ror":"https://ror.org/03adqg323","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I15057530","https://openalex.org/I4210142254","https://openalex.org/I4210159245","https://openalex.org/I4210160189"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Julien Rodriguez","raw_affiliation_strings":[", Universit de Bordeaux, LaBRI et INRIA 2","LECA - Laboratoire Environnement de Conception & Architecture (CEA-Palaiseau - France)","DSCIN (CEA, LIST) - D\u00e9partement Syst\u00e8mes et Circuits Int\u00e9gr\u00e9s Num\u00e9riques (France)","LIST (CEA) - Laboratoire d'Int\u00e9gration des Syst\u00e8mes et des Technologies (DRT/LIST\r\nNano-INNOV\r\nAvenue de la Vauve\r\n91120 Palaiseau - France)","UB - Universit\u00e9 de Bordeaux (35, place Pey Berland - 33076 Bordeaux - France)","TADAAM - Topology-Aware System-Scale Data Management for High-Performance Computing (200, avenue de la Vieille Tour \r\n33405 Talence cedex - France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":", Universit de Bordeaux, LaBRI et INRIA 2","institution_ids":["https://openalex.org/I1326498283","https://openalex.org/I4210142254"]},{"raw_affiliation_string":"LECA - Laboratoire Environnement de Conception & Architecture (CEA-Palaiseau - France)","institution_ids":["https://openalex.org/I2738703131"]},{"raw_affiliation_string":"DSCIN (CEA, LIST) - D\u00e9partement Syst\u00e8mes et Circuits Int\u00e9gr\u00e9s Num\u00e9riques (France)","institution_ids":["https://openalex.org/I2738703131","https://openalex.org/I4210085861"]},{"raw_affiliation_string":"LIST (CEA) - Laboratoire d'Int\u00e9gration des Syst\u00e8mes et des Technologies (DRT/LIST\r\nNano-INNOV\r\nAvenue de la Vauve\r\n91120 Palaiseau - France)","institution_ids":["https://openalex.org/I2738703131","https://openalex.org/I4210085861"]},{"raw_affiliation_string":"UB - Universit\u00e9 de Bordeaux (35, place Pey Berland - 33076 Bordeaux - France)","institution_ids":["https://openalex.org/I15057530"]},{"raw_affiliation_string":"TADAAM - Topology-Aware System-Scale Data Management for High-Performance Computing (200, avenue de la Vieille Tour \r\n33405 Talence cedex - France)","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030521052","display_name":"Fran\u00e7ois Galea","orcid":"https://orcid.org/0000-0002-1594-152X"},"institutions":[{"id":"https://openalex.org/I1326498283","display_name":"Institut national de recherche en sciences et technologies du num\u00e9rique","ror":"https://ror.org/02kvxyf05","country_code":"FR","type":"government","lineage":["https://openalex.org/I1326498283"]},{"id":"https://openalex.org/I2738703131","display_name":"Commissariat \u00e0 l'\u00c9nergie Atomique et aux \u00c9nergies Alternatives","ror":"https://ror.org/00jjx8s55","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131"]},{"id":"https://openalex.org/I277688954","display_name":"Universit\u00e9 Paris-Saclay","ror":"https://ror.org/03xjwb503","country_code":"FR","type":"education","lineage":["https://openalex.org/I277688954"]},{"id":"https://openalex.org/I4210085861","display_name":"Laboratoire d'Int\u00e9gration des Syst\u00e8mes et des Technologies","ror":"https://ror.org/000dbcc61","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131","https://openalex.org/I2738703131","https://openalex.org/I277688954","https://openalex.org/I4210085861","https://openalex.org/I4210117989"]},{"id":"https://openalex.org/I4210142254","display_name":"Laboratoire Bordelais de Recherche en Informatique","ror":"https://ror.org/03adqg323","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I15057530","https://openalex.org/I4210142254","https://openalex.org/I4210159245","https://openalex.org/I4210160189"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Francois Galea","raw_affiliation_strings":[", Universit de Bordeaux, LaBRI et INRIA 2","LECA - Laboratoire Environnement de Conception & Architecture (CEA-Palaiseau - France)","Universit\u00e9 Paris-Saclay (B\u00e2timent Br\u00e9guet, 3 Rue Joliot Curie 2e \u00e9t, 91190 Gif-sur-Yvette - France)","DSCIN (CEA, LIST) - D\u00e9partement Syst\u00e8mes et Circuits Int\u00e9gr\u00e9s Num\u00e9riques (France)","LIST (CEA) - Laboratoire d'Int\u00e9gration des Syst\u00e8mes et des Technologies (DRT/LIST\r\nNano-INNOV\r\nAvenue de la Vauve\r\n91120 Palaiseau - France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":", Universit de Bordeaux, LaBRI et INRIA 2","institution_ids":["https://openalex.org/I1326498283","https://openalex.org/I4210142254"]},{"raw_affiliation_string":"LECA - Laboratoire Environnement de Conception & Architecture (CEA-Palaiseau - France)","institution_ids":["https://openalex.org/I2738703131"]},{"raw_affiliation_string":"Universit\u00e9 Paris-Saclay (B\u00e2timent Br\u00e9guet, 3 Rue Joliot Curie 2e \u00e9t, 91190 Gif-sur-Yvette - France)","institution_ids":["https://openalex.org/I277688954"]},{"raw_affiliation_string":"DSCIN (CEA, LIST) - D\u00e9partement Syst\u00e8mes et Circuits Int\u00e9gr\u00e9s Num\u00e9riques (France)","institution_ids":["https://openalex.org/I2738703131","https://openalex.org/I4210085861"]},{"raw_affiliation_string":"LIST (CEA) - Laboratoire d'Int\u00e9gration des Syst\u00e8mes et des Technologies (DRT/LIST\r\nNano-INNOV\r\nAvenue de la Vauve\r\n91120 Palaiseau - France)","institution_ids":["https://openalex.org/I2738703131","https://openalex.org/I4210085861"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091513717","display_name":"Fran\u00e7ois Pellegrini","orcid":"https://orcid.org/0000-0003-3983-6289"},"institutions":[{"id":"https://openalex.org/I15057530","display_name":"Universit\u00e9 de Bordeaux","ror":"https://ror.org/057qpr032","country_code":"FR","type":"education","lineage":["https://openalex.org/I15057530"]},{"id":"https://openalex.org/I4210142254","display_name":"Laboratoire Bordelais de Recherche en Informatique","ror":"https://ror.org/03adqg323","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I15057530","https://openalex.org/I4210142254","https://openalex.org/I4210159245","https://openalex.org/I4210160189"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Fran\u00e7ois Pellegrini","raw_affiliation_strings":["LaBRI - Laboratoire Bordelais de Recherche en Informatique (Domaine Universitaire 351, cours de la Lib\u00e9ration 33405 Talence Cedex - France)","TADAAM - Topology-Aware System-Scale Data Management for High-Performance Computing (200, avenue de la Vieille Tour \r\n33405 Talence cedex - France)","UB - Universit\u00e9 de Bordeaux (35, place Pey Berland - 33076 Bordeaux - France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LaBRI - Laboratoire Bordelais de Recherche en Informatique (Domaine Universitaire 351, cours de la Lib\u00e9ration 33405 Talence Cedex - France)","institution_ids":["https://openalex.org/I4210142254"]},{"raw_affiliation_string":"TADAAM - Topology-Aware System-Scale Data Management for High-Performance Computing (200, avenue de la Vieille Tour \r\n33405 Talence cedex - France)","institution_ids":[]},{"raw_affiliation_string":"UB - Universit\u00e9 de Bordeaux (35, place Pey Berland - 33076 Bordeaux - France)","institution_ids":["https://openalex.org/I15057530"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5018872474","display_name":"Lilia Zaourar","orcid":"https://orcid.org/0000-0002-6660-4347"},"institutions":[{"id":"https://openalex.org/I1326498283","display_name":"Institut national de recherche en sciences et technologies du num\u00e9rique","ror":"https://ror.org/02kvxyf05","country_code":"FR","type":"government","lineage":["https://openalex.org/I1326498283"]},{"id":"https://openalex.org/I2738703131","display_name":"Commissariat \u00e0 l'\u00c9nergie Atomique et aux \u00c9nergies Alternatives","ror":"https://ror.org/00jjx8s55","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131"]},{"id":"https://openalex.org/I277688954","display_name":"Universit\u00e9 Paris-Saclay","ror":"https://ror.org/03xjwb503","country_code":"FR","type":"education","lineage":["https://openalex.org/I277688954"]},{"id":"https://openalex.org/I4210085861","display_name":"Laboratoire d'Int\u00e9gration des Syst\u00e8mes et des Technologies","ror":"https://ror.org/000dbcc61","country_code":"FR","type":"government","lineage":["https://openalex.org/I2738703131","https://openalex.org/I2738703131","https://openalex.org/I277688954","https://openalex.org/I4210085861","https://openalex.org/I4210117989"]},{"id":"https://openalex.org/I4210142254","display_name":"Laboratoire Bordelais de Recherche en Informatique","ror":"https://ror.org/03adqg323","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I15057530","https://openalex.org/I4210142254","https://openalex.org/I4210159245","https://openalex.org/I4210160189"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Lilia Zaourar","raw_affiliation_strings":[", Universit de Bordeaux, LaBRI et INRIA 2","LIST (CEA) - Laboratoire d'Int\u00e9gration des Syst\u00e8mes et des Technologies (DRT/LIST\r\nNano-INNOV\r\nAvenue de la Vauve\r\n91120 Palaiseau - France)","LECA - Laboratoire Environnement de Conception & Architecture (CEA-Palaiseau - France)","Universit\u00e9 Paris-Saclay (B\u00e2timent Br\u00e9guet, 3 Rue Joliot Curie 2e \u00e9t, 91190 Gif-sur-Yvette - France)","DSCIN (CEA, LIST) - D\u00e9partement Syst\u00e8mes et Circuits Int\u00e9gr\u00e9s Num\u00e9riques (France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":", Universit de Bordeaux, LaBRI et INRIA 2","institution_ids":["https://openalex.org/I1326498283","https://openalex.org/I4210142254"]},{"raw_affiliation_string":"LIST (CEA) - Laboratoire d'Int\u00e9gration des Syst\u00e8mes et des Technologies (DRT/LIST\r\nNano-INNOV\r\nAvenue de la Vauve\r\n91120 Palaiseau - France)","institution_ids":["https://openalex.org/I2738703131","https://openalex.org/I4210085861"]},{"raw_affiliation_string":"LECA - Laboratoire Environnement de Conception & Architecture (CEA-Palaiseau - France)","institution_ids":["https://openalex.org/I2738703131"]},{"raw_affiliation_string":"Universit\u00e9 Paris-Saclay (B\u00e2timent Br\u00e9guet, 3 Rue Joliot Curie 2e \u00e9t, 91190 Gif-sur-Yvette - France)","institution_ids":["https://openalex.org/I277688954"]},{"raw_affiliation_string":"DSCIN (CEA, LIST) - D\u00e9partement Syst\u00e8mes et Circuits Int\u00e9gr\u00e9s Num\u00e9riques (France)","institution_ids":["https://openalex.org/I2738703131","https://openalex.org/I4210085861"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":true,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"35","issue":null,"first_page":"1119","last_page":"1123"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9934999942779541,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9934999942779541,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10374","display_name":"Advanced Graph Theory Research","score":0.9769999980926514,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10551","display_name":"Scheduling and Optimization Algorithms","score":0.9699000120162964,"subfield":{"id":"https://openalex.org/subfields/2209","display_name":"Industrial and Manufacturing Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/hypergraph","display_name":"Hypergraph","score":0.8510941863059998},{"id":"https://openalex.org/keywords/integer-programming","display_name":"Integer programming","score":0.6734882593154907},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6085847616195679},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.577949047088623},{"id":"https://openalex.org/keywords/integer","display_name":"Integer (computer science)","score":0.48152002692222595},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.43116313219070435},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3575294017791748},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.33592694997787476},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3314582109451294},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.2923703193664551},{"id":"https://openalex.org/keywords/combinatorics","display_name":"Combinatorics","score":0.27509361505508423},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.08880934119224548}],"concepts":[{"id":"https://openalex.org/C2781221856","wikidata":"https://www.wikidata.org/wiki/Q840247","display_name":"Hypergraph","level":2,"score":0.8510941863059998},{"id":"https://openalex.org/C56086750","wikidata":"https://www.wikidata.org/wiki/Q6042592","display_name":"Integer programming","level":2,"score":0.6734882593154907},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6085847616195679},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.577949047088623},{"id":"https://openalex.org/C97137487","wikidata":"https://www.wikidata.org/wiki/Q729138","display_name":"Integer (computer science)","level":2,"score":0.48152002692222595},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.43116313219070435},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3575294017791748},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.33592694997787476},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3314582109451294},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.2923703193664551},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.27509361505508423},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.08880934119224548}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.15439/2023f592","is_oa":true,"landing_page_url":"http://dx.doi.org/10.15439/2023f592","pdf_url":"https://annals-csis.org/proceedings/2023/drp/pdf/592.pdf","source":{"id":"https://openalex.org/S4220651875","display_name":"Annals of Computer Science and Information Systems","issn_l":"2300-5963","issn":["2300-5963"],"is_oa":true,"is_in_doaj":true,"is_core":false,"host_organization":"https://openalex.org/P4310317484","host_organization_name":"Polskie Towarzystwo Informatyczne","host_organization_lineage":["https://openalex.org/P4310317484"],"host_organization_lineage_names":["Polskie Towarzystwo Informatyczne"],"type":"conference"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Annals of Computer Science and Information Systems","raw_type":"proceedings-article"},{"id":"pmh:oai:HAL:hal-04379729v1","is_oa":true,"landing_page_url":"https://hal.science/hal-04379729","pdf_url":"https://hal.science/hal-04379729/document","source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Annals of Computer Science and Information Systems, 2023, pp.1119-1123. &#x27E8;10.15439/2023F592&#x27E9;","raw_type":"info:eu-repo/semantics/article"},{"id":"pmh:oai:doaj.org/article:08fc9e003ca54634b75a1815eebbcd17","is_oa":true,"landing_page_url":"https://doaj.org/article/08fc9e003ca54634b75a1815eebbcd17","pdf_url":null,"source":{"id":"https://openalex.org/S4306401280","display_name":"DOAJ (DOAJ: Directory of Open Access Journals)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-sa","license_id":"https://openalex.org/licenses/cc-by-sa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Annals of computer science and information systems, Vol 35, Pp 1119-1123 (2023)","raw_type":"article"}],"best_oa_location":{"id":"doi:10.15439/2023f592","is_oa":true,"landing_page_url":"http://dx.doi.org/10.15439/2023f592","pdf_url":"https://annals-csis.org/proceedings/2023/drp/pdf/592.pdf","source":{"id":"https://openalex.org/S4220651875","display_name":"Annals of Computer Science and Information Systems","issn_l":"2300-5963","issn":["2300-5963"],"is_oa":true,"is_in_doaj":true,"is_core":false,"host_organization":"https://openalex.org/P4310317484","host_organization_name":"Polskie Towarzystwo Informatyczne","host_organization_lineage":["https://openalex.org/P4310317484"],"host_organization_lineage_names":["Polskie Towarzystwo Informatyczne"],"type":"conference"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Annals of Computer Science and Information Systems","raw_type":"proceedings-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W4387619780.pdf","grobid_xml":"https://content.openalex.org/works/W4387619780.grobid-xml"},"referenced_works_count":12,"referenced_works":["https://openalex.org/W2078174680","https://openalex.org/W2095117703","https://openalex.org/W2124618076","https://openalex.org/W2124860471","https://openalex.org/W2148750424","https://openalex.org/W2153752762","https://openalex.org/W3011427649","https://openalex.org/W3213962700","https://openalex.org/W4251729857","https://openalex.org/W4255476700","https://openalex.org/W4309764772","https://openalex.org/W4382244023"],"related_works":["https://openalex.org/W4376608589","https://openalex.org/W3138003926","https://openalex.org/W4300037846","https://openalex.org/W1630514295","https://openalex.org/W1925942709","https://openalex.org/W2047683846","https://openalex.org/W2044902158","https://openalex.org/W2082154838","https://openalex.org/W2109912052","https://openalex.org/W1711527768"],"abstract_inverted_index":{"Circuit":[0],"prototyping":[1],"on":[2,37,44,106],"multi-FPGA":[3,38],"(Field":[4],"Programmable":[5],"Gate":[6],"Arrays)":[7],"platforms":[8],"is":[9,28],"a":[10,97,131,136],"widely":[11],"used":[12],"technique":[13],"in":[14],"the":[15,22,46,53,74,77,81,107,113,116,121],"VLSI":[16],"(Very-Large-Scale":[17],"Integration)":[18],"context.":[19],"Due":[20],"to":[21,30,34,65,72],"ever-increasing":[23],"size":[24,48],"of":[25,76,115],"circuits,":[26],"it":[27],"necessary":[29],"use":[31,88],"partitioning":[32,41,127],"algorithms":[33,42],"place":[35],"them":[36],"platforms.":[39],"Existing":[40],"focus":[43],"minimizing":[45],"cut":[47],"but":[49,84],"do":[50],"not":[51],"consider":[52,73],"critical":[54,78,117,138],"path":[55,79,118,139],"length,":[56],"which":[57],"can":[58],"be":[59],"degraded":[60],"when":[61],"mapping":[62],"long":[63],"paths":[64],"multiple":[66],"FPGAs.":[67],"However,":[68],"recent":[69],"studies":[70],"try":[71],"degradation":[75,119],"and":[80,120,134],"target":[82,122],"topology":[83],"these":[85],"works":[86],"still":[87],"cutting":[89],"minimization":[90,114],"algorithms.":[91],"In":[92],"this":[93],"work,":[94],"we":[95],"propose":[96],"mathematical":[98],"model":[99,110],"as":[100],"an":[101],"integer":[102],"program":[103],"(IP)":[104],"based":[105],"Red-Black":[108],"Hypergraph":[109],"that":[111],"considers":[112],"topology.":[123],"We":[124],"compare":[125],"our":[126],"results":[128],"with":[129],"KHMETIS,":[130],"min-cut":[132],"algorithm,":[133],"show":[135],"better":[137],"for":[140],"many":[141],"circuit":[142],"instances.":[143]},"counts_by_year":[],"updated_date":"2026-07-25T09:21:30.201066","created_date":"2025-10-10T00:00:00"}
