{"id":"https://openalex.org/W2527148519","doi":"https://doi.org/10.15439/2016f327","title":"Energy-efficient FPGA Implementation of the k-Nearest Neighbors Algorithm Using OpenCL","display_name":"Energy-efficient FPGA Implementation of the k-Nearest Neighbors Algorithm Using OpenCL","publication_year":2016,"publication_date":"2016-10-02","ids":{"openalex":"https://openalex.org/W2527148519","doi":"https://doi.org/10.15439/2016f327","mag":"2527148519"},"language":"en","primary_location":{"id":"doi:10.15439/2016f327","is_oa":true,"landing_page_url":"https://doi.org/10.15439/2016f327","pdf_url":"https://annals-csis.org/proceedings/2016/pliks/327.pdf","source":{"id":"https://openalex.org/S4220651875","display_name":"Annals of Computer Science and Information Systems","issn_l":"2300-5963","issn":["2300-5963"],"is_oa":true,"is_in_doaj":true,"is_core":false,"host_organization":"https://openalex.org/P4310317484","host_organization_name":"Polskie Towarzystwo Informatyczne","host_organization_lineage":["https://openalex.org/P4310317484"],"host_organization_lineage_names":["Polskie Towarzystwo Informatyczne"],"type":"conference"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Annals of Computer Science and Information Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"diamond","oa_url":"https://annals-csis.org/proceedings/2016/pliks/327.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5037596497","display_name":"Fahad Bin Muslim","orcid":"https://orcid.org/0000-0002-4153-360X"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Fahad Muslim","raw_affiliation_strings":["Department of Electronics and Telecommunication Politecnico di Torino, ITALY"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Telecommunication Politecnico di Torino, ITALY","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043130719","display_name":"Alexandros Demian","orcid":null},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Alexandros Demian","raw_affiliation_strings":["Department of Electronics and Telecommunication Politecnico di Torino, ITALY"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Telecommunication Politecnico di Torino, ITALY","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100733564","display_name":"Liang Ma","orcid":"https://orcid.org/0000-0002-3048-5112"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Liang Ma","raw_affiliation_strings":["Department of Electronics and Telecommunication Politecnico di Torino, ITALY"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Telecommunication Politecnico di Torino, ITALY","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050365912","display_name":"Luciano Lavagno","orcid":"https://orcid.org/0000-0002-9762-6522"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Luciano Lavagno","raw_affiliation_strings":["Department of Electronics and Telecommunication Politecnico di Torino, ITALY"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Telecommunication Politecnico di Torino, ITALY","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5046608206","display_name":"Affaq Qamar","orcid":"https://orcid.org/0000-0002-4350-4677"},"institutions":[{"id":"https://openalex.org/I53831458","display_name":"Abasyn University","ror":"https://ror.org/05ws11813","country_code":"PK","type":"education","lineage":["https://openalex.org/I53831458"]}],"countries":["PK"],"is_corresponding":false,"raw_author_name":"Affaq Qamar","raw_affiliation_strings":["Department of Electrical Engineering Abasyn University, Peshawar Pakistan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering Abasyn University, Peshawar Pakistan","institution_ids":["https://openalex.org/I53831458"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5037596497"],"corresponding_institution_ids":["https://openalex.org/I177477856"],"apc_list":null,"apc_paid":null,"fwci":2.095,"has_fulltext":true,"cited_by_count":14,"citation_normalized_percentile":{"value":0.88235294,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"9","issue":null,"first_page":"141","last_page":"145"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8716385364532471},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8622400760650635},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5157797336578369},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.4438713788986206},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.41514405608177185},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.4128357172012329},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.41026103496551514},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3830675482749939},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.09362024068832397}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8716385364532471},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8622400760650635},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5157797336578369},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.4438713788986206},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.41514405608177185},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.4128357172012329},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.41026103496551514},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3830675482749939},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.09362024068832397}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.15439/2016f327","is_oa":true,"landing_page_url":"https://doi.org/10.15439/2016f327","pdf_url":"https://annals-csis.org/proceedings/2016/pliks/327.pdf","source":{"id":"https://openalex.org/S4220651875","display_name":"Annals of Computer Science and Information Systems","issn_l":"2300-5963","issn":["2300-5963"],"is_oa":true,"is_in_doaj":true,"is_core":false,"host_organization":"https://openalex.org/P4310317484","host_organization_name":"Polskie Towarzystwo Informatyczne","host_organization_lineage":["https://openalex.org/P4310317484"],"host_organization_lineage_names":["Polskie Towarzystwo Informatyczne"],"type":"conference"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Annals of Computer Science and Information Systems","raw_type":"proceedings-article"},{"id":"pmh:oai:doaj.org/article:921ed8a852c347c29ff00bdf5c04f583","is_oa":true,"landing_page_url":"https://doaj.org/article/921ed8a852c347c29ff00bdf5c04f583","pdf_url":null,"source":{"id":"https://openalex.org/S4306401280","display_name":"DOAJ (DOAJ: Directory of Open Access Journals)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-sa","license_id":"https://openalex.org/licenses/cc-by-sa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Annals of computer science and information systems, Vol 9, Pp 141-145 (2016)","raw_type":"article"},{"id":"pmh:oai:porto.polito.it:2651826","is_oa":true,"landing_page_url":"http://porto.polito.it/2651826/","pdf_url":null,"source":{"id":"https://openalex.org/S4306402038","display_name":"PORTO Publications Open Repository TOrino (Politecnico di Torino)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I177477856","host_organization_name":"Politecnico di Torino","host_organization_lineage":["https://openalex.org/I177477856"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ISSN:2300-5963","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":{"id":"doi:10.15439/2016f327","is_oa":true,"landing_page_url":"https://doi.org/10.15439/2016f327","pdf_url":"https://annals-csis.org/proceedings/2016/pliks/327.pdf","source":{"id":"https://openalex.org/S4220651875","display_name":"Annals of Computer Science and Information Systems","issn_l":"2300-5963","issn":["2300-5963"],"is_oa":true,"is_in_doaj":true,"is_core":false,"host_organization":"https://openalex.org/P4310317484","host_organization_name":"Polskie Towarzystwo Informatyczne","host_organization_lineage":["https://openalex.org/P4310317484"],"host_organization_lineage_names":["Polskie Towarzystwo Informatyczne"],"type":"conference"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Annals of Computer Science and Information Systems","raw_type":"proceedings-article"},"sustainable_development_goals":[{"score":0.8399999737739563,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G1535130713","display_name":null,"funder_award_id":"H2020-ICT","funder_id":"https://openalex.org/F4320320300","funder_display_name":"European Commission"},{"id":"https://openalex.org/G2626973862","display_name":null,"funder_award_id":"671632","funder_id":"https://openalex.org/F4320320300","funder_display_name":"European Commission"},{"id":"https://openalex.org/G2629925963","display_name":null,"funder_award_id":"H2020-ICT-671632","funder_id":"https://openalex.org/F4320320300","funder_display_name":"European Commission"},{"id":"https://openalex.org/G4937468798","display_name":null,"funder_award_id":"H2020","funder_id":"https://openalex.org/F4320320300","funder_display_name":"European Commission"}],"funders":[{"id":"https://openalex.org/F4320314786","display_name":"Xilinx","ror":"https://ror.org/01rb7bk56"},{"id":"https://openalex.org/F4320320300","display_name":"European Commission","ror":"https://ror.org/00k4n6c32"},{"id":"https://openalex.org/F4320332999","display_name":"Horizon 2020 Framework Programme","ror":"https://ror.org/00k4n6c32"}],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2527148519.pdf","grobid_xml":"https://content.openalex.org/works/W2527148519.grobid-xml"},"referenced_works_count":9,"referenced_works":["https://openalex.org/W1518139028","https://openalex.org/W1984222112","https://openalex.org/W2028960610","https://openalex.org/W2080592089","https://openalex.org/W2124592110","https://openalex.org/W2266055932","https://openalex.org/W2272300165","https://openalex.org/W2474119684","https://openalex.org/W4255138242"],"related_works":["https://openalex.org/W2612099726","https://openalex.org/W1612076744","https://openalex.org/W2126857316","https://openalex.org/W2152074211","https://openalex.org/W2129019972","https://openalex.org/W3164085601","https://openalex.org/W1522032972","https://openalex.org/W2113308450","https://openalex.org/W2160632767","https://openalex.org/W2139962137"],"abstract_inverted_index":{"SoCs":[0],"are":[1,40],"getting":[2],"increasingly":[3],"heterogeneous":[4],"with":[5],"a":[6],"combination":[7],"of":[8,19],"multi-core":[9],"architectures":[10],"and":[11,35,68],"hardware":[12],"accelerators":[13],"to":[14,30,43,58],"speed":[15,34],"up":[16],"the":[17,44],"execution":[18,33],"computeintensive":[20],"tasks":[21],"at":[22],"considerably":[23],"lower":[24,37],"power":[25,38],"consumption.":[26],"Modern":[27],"FPGAs,":[28],"due":[29],"their":[31],"reasonable":[32],"comparatively":[36],"consumption,":[39],"strong":[41],"competitors":[42],"traditional":[45],"GPU":[46],"based":[47],"accelerators.":[48],"High-level":[49],"Synthesis":[50],"(HLS)":[51],"simplifies":[52],"FPGA":[53],"programming":[54],"by":[55],"allowing":[56],"designers":[57],"program":[59],"FPGAs":[60],"in":[61],"several":[62],"high-level":[63],"languages":[64],"e.g.":[65],"C/C++,":[66],"OpenCL":[67],"SystemC.":[69]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2026-05-06T08:25:59.206177","created_date":"2025-10-10T00:00:00"}