{"id":"https://openalex.org/W4285291585","doi":"https://doi.org/10.12720/jcm.17.5.386-392","title":"Implementation Dual Parallelism Cybersecurity Architecture on FPGA","display_name":"Implementation Dual Parallelism Cybersecurity Architecture on FPGA","publication_year":2022,"publication_date":"2022-01-01","ids":{"openalex":"https://openalex.org/W4285291585","doi":"https://doi.org/10.12720/jcm.17.5.386-392"},"language":"en","primary_location":{"id":"doi:10.12720/jcm.17.5.386-392","is_oa":true,"landing_page_url":"https://doi.org/10.12720/jcm.17.5.386-392","pdf_url":null,"source":{"id":"https://openalex.org/S184821498","display_name":"Journal of Communications","issn_l":"1796-2021","issn":["1796-2021","2374-4367"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4323867253","host_organization_name":"International Communication Association","host_organization_lineage":["https://openalex.org/P4323867253"],"host_organization_lineage_names":["International Communication Association"],"type":"journal"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Communications","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://doi.org/10.12720/jcm.17.5.386-392","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5040641527","display_name":"Nada Qasim Mohammed","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Nada Qasim Mohammed","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001180227","display_name":"Amiza Amir","orcid":"https://orcid.org/0000-0001-9300-1456"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Amiza Amir","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059760398","display_name":"Muataz Hammed Salih","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Muataz Hammed Salih","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5092216840","display_name":"Hana Arrfou","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Hana Arrfou","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5092314600","display_name":"Qasim Mohaammed Hussein","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Qasim Mohaammed Hussein","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5100348176","display_name":"R. Badlishah Ahmad","orcid":"https://orcid.org/0000-0002-4862-2728"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Badlishah Ahmad","raw_affiliation_strings":[],"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5040641527"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.4541,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.58365904,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"386","last_page":"392"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9700999855995178,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9700999855995178,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9682999849319458,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9639999866485596,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8572996854782104},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.733365535736084},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7252630591392517},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.6973090767860413},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5406498312950134},{"id":"https://openalex.org/keywords/parallelism","display_name":"Parallelism (grammar)","score":0.5073594450950623},{"id":"https://openalex.org/keywords/dual","display_name":"Dual (grammatical number)","score":0.4699943959712982},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.469943106174469},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.4164406359195709},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3402327299118042},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2045508623123169},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.06914162635803223}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8572996854782104},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.733365535736084},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7252630591392517},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.6973090767860413},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5406498312950134},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.5073594450950623},{"id":"https://openalex.org/C2780980858","wikidata":"https://www.wikidata.org/wiki/Q110022","display_name":"Dual (grammatical number)","level":2,"score":0.4699943959712982},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.469943106174469},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.4164406359195709},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3402327299118042},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2045508623123169},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.06914162635803223},{"id":"https://openalex.org/C124952713","wikidata":"https://www.wikidata.org/wiki/Q8242","display_name":"Literature","level":1,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.12720/jcm.17.5.386-392","is_oa":true,"landing_page_url":"https://doi.org/10.12720/jcm.17.5.386-392","pdf_url":null,"source":{"id":"https://openalex.org/S184821498","display_name":"Journal of Communications","issn_l":"1796-2021","issn":["1796-2021","2374-4367"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4323867253","host_organization_name":"International Communication Association","host_organization_lineage":["https://openalex.org/P4323867253"],"host_organization_lineage_names":["International Communication Association"],"type":"journal"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Communications","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.12720/jcm.17.5.386-392","is_oa":true,"landing_page_url":"https://doi.org/10.12720/jcm.17.5.386-392","pdf_url":null,"source":{"id":"https://openalex.org/S184821498","display_name":"Journal of Communications","issn_l":"1796-2021","issn":["1796-2021","2374-4367"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4323867253","host_organization_name":"International Communication Association","host_organization_lineage":["https://openalex.org/P4323867253"],"host_organization_lineage_names":["International Communication Association"],"type":"journal"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Communications","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W1608806855","https://openalex.org/W2023505575","https://openalex.org/W1850053445","https://openalex.org/W1578204257","https://openalex.org/W2313503008","https://openalex.org/W1972912085","https://openalex.org/W2386644492","https://openalex.org/W300950598","https://openalex.org/W2047588290","https://openalex.org/W3030139520"],"abstract_inverted_index":{"This":[0,25],"paper":[1],"presents":[2],"an":[3],"efficient":[4],"parallelism":[5,21],"architecture":[6,12,26,78,106],"that":[7,43],"uses":[8],"a":[9,90,121],"dual-computing":[10],"engine":[11,99],"to":[13],"better":[14,80],"throughput":[15,37,84,122],"using":[16,89],"both":[17],"spatial":[18],"and":[19,36,38,63,73,83,119],"temporal":[20],"on":[22],"FPGA":[23],"technology.":[24],"will":[27],"enhance":[28],"the":[29,40,101,104,110,113],"performance":[30],"in":[31,112],"terms":[32],"of":[33,53,92,123],"operating":[34],"frequency":[35,91],"reduces":[39],"power":[41],"consumption":[42],"meets":[44],"applications":[45],"with":[46,66,94],"huge":[47],"data":[48],"processing":[49],"such":[50],"as":[51],"Internet":[52],"Things":[54],".in":[55],"this":[56],"design,":[57],"two":[58],"boards":[59],"are":[60],"used,":[61],"\"DE1_Soc":[62],"NEEK":[64],"board\"":[65],"Altera":[67],"Quartus":[68],"Prime":[69],"18":[70],"for":[71,97],"synthesis":[72],"simulation.":[74],"The":[75],"proposed":[76,105],"design":[77],"gives":[79],"resource":[81],"usage":[82],"through":[85],"fewer":[86],"hardware":[87],"redundancies":[88],"600MHZ":[93],"64":[95],"bits":[96],"each":[98],"from":[100],"dual-engine.":[102],"Furthermore,":[103],"implementation":[107],"results":[108],"show":[109],"reduction":[111],"time":[114],"delay":[115],"by":[116],"40":[117],"%":[118],"achieves":[120],"153.6":[124],"Gb/s":[125]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1}],"updated_date":"2026-01-13T01:12:25.745995","created_date":"2022-07-14T00:00:00"}