{"id":"https://openalex.org/W4377238932","doi":"https://doi.org/10.1186/s40537-023-00761-0","title":"Main memory controller with multiple media technologies for big data workloads","display_name":"Main memory controller with multiple media technologies for big data workloads","publication_year":2023,"publication_date":"2023-05-22","ids":{"openalex":"https://openalex.org/W4377238932","doi":"https://doi.org/10.1186/s40537-023-00761-0"},"language":"en","primary_location":{"id":"doi:10.1186/s40537-023-00761-0","is_oa":true,"landing_page_url":"http://dx.doi.org/10.1186/s40537-023-00761-0","pdf_url":"https://journalofbigdata.springeropen.com/counter/pdf/10.1186/s40537-023-00761-0","source":{"id":"https://openalex.org/S2737955091","display_name":"Journal Of Big Data","issn_l":"2196-1115","issn":["2196-1115"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Big Data","raw_type":"journal-article"},"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://journalofbigdata.springeropen.com/counter/pdf/10.1186/s40537-023-00761-0","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5091993995","display_name":"Miguel A. Avargues","orcid":"https://orcid.org/0000-0002-4339-2345"},"institutions":[{"id":"https://openalex.org/I60053951","display_name":"Universitat Polit\u00e8cnica de Val\u00e8ncia","ror":"https://ror.org/01460j859","country_code":"ES","type":"education","lineage":["https://openalex.org/I60053951"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"Miguel A. Avargues","raw_affiliation_strings":["Dep. de Inform\u00e1tica de Sistemas y Computadores, Universitat Polit\u00e8cnica de Val\u00e8ncia, Val\u00e8ncia, Spain"],"affiliations":[{"raw_affiliation_string":"Dep. de Inform\u00e1tica de Sistemas y Computadores, Universitat Polit\u00e8cnica de Val\u00e8ncia, Val\u00e8ncia, Spain","institution_ids":["https://openalex.org/I60053951"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5086843239","display_name":"Manel Lurbe","orcid":"https://orcid.org/0000-0003-0095-195X"},"institutions":[{"id":"https://openalex.org/I60053951","display_name":"Universitat Polit\u00e8cnica de Val\u00e8ncia","ror":"https://ror.org/01460j859","country_code":"ES","type":"education","lineage":["https://openalex.org/I60053951"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Manel Lurbe","raw_affiliation_strings":["Dep. de Inform\u00e1tica de Sistemas y Computadores, Universitat Polit\u00e8cnica de Val\u00e8ncia, Val\u00e8ncia, Spain"],"affiliations":[{"raw_affiliation_string":"Dep. de Inform\u00e1tica de Sistemas y Computadores, Universitat Polit\u00e8cnica de Val\u00e8ncia, Val\u00e8ncia, Spain","institution_ids":["https://openalex.org/I60053951"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013237315","display_name":"Salvador Petit","orcid":"https://orcid.org/0000-0003-2426-4134"},"institutions":[{"id":"https://openalex.org/I60053951","display_name":"Universitat Polit\u00e8cnica de Val\u00e8ncia","ror":"https://ror.org/01460j859","country_code":"ES","type":"education","lineage":["https://openalex.org/I60053951"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Salvador Petit","raw_affiliation_strings":["Dep. de Inform\u00e1tica de Sistemas y Computadores, Universitat Polit\u00e8cnica de Val\u00e8ncia, Val\u00e8ncia, Spain"],"affiliations":[{"raw_affiliation_string":"Dep. de Inform\u00e1tica de Sistemas y Computadores, Universitat Polit\u00e8cnica de Val\u00e8ncia, Val\u00e8ncia, Spain","institution_ids":["https://openalex.org/I60053951"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033867189","display_name":"Mar\u00eda E. G\u00f3mez","orcid":"https://orcid.org/0000-0003-1466-4118"},"institutions":[{"id":"https://openalex.org/I60053951","display_name":"Universitat Polit\u00e8cnica de Val\u00e8ncia","ror":"https://ror.org/01460j859","country_code":"ES","type":"education","lineage":["https://openalex.org/I60053951"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Maria E. Gomez","raw_affiliation_strings":["Dep. de Inform\u00e1tica de Sistemas y Computadores, Universitat Polit\u00e8cnica de Val\u00e8ncia, Val\u00e8ncia, Spain"],"affiliations":[{"raw_affiliation_string":"Dep. de Inform\u00e1tica de Sistemas y Computadores, Universitat Polit\u00e8cnica de Val\u00e8ncia, Val\u00e8ncia, Spain","institution_ids":["https://openalex.org/I60053951"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030499511","display_name":"Rui Yang","orcid":"https://orcid.org/0000-0002-5634-5476"},"institutions":[{"id":"https://openalex.org/I2250955327","display_name":"Huawei Technologies (China)","ror":"https://ror.org/00cmhce21","country_code":"CN","type":"company","lineage":["https://openalex.org/I2250955327"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Rui Yang","raw_affiliation_strings":["Huawei Technologies Co. Ltd., Shenzhen, People\u2019s Republic of China"],"affiliations":[{"raw_affiliation_string":"Huawei Technologies Co. Ltd., Shenzhen, People\u2019s Republic of China","institution_ids":["https://openalex.org/I2250955327"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102020364","display_name":"Xiaoping Zhu","orcid":"https://orcid.org/0000-0002-6165-5751"},"institutions":[{"id":"https://openalex.org/I2250955327","display_name":"Huawei Technologies (China)","ror":"https://ror.org/00cmhce21","country_code":"CN","type":"company","lineage":["https://openalex.org/I2250955327"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiaoping Zhu","raw_affiliation_strings":["Huawei Technologies Co. Ltd., Shenzhen, People\u2019s Republic of China"],"affiliations":[{"raw_affiliation_string":"Huawei Technologies Co. Ltd., Shenzhen, People\u2019s Republic of China","institution_ids":["https://openalex.org/I2250955327"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108838235","display_name":"Guanhao Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I2250955327","display_name":"Huawei Technologies (China)","ror":"https://ror.org/00cmhce21","country_code":"CN","type":"company","lineage":["https://openalex.org/I2250955327"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Guanhao Wang","raw_affiliation_strings":["Huawei Technologies Co. Ltd., Shenzhen, People\u2019s Republic of China"],"affiliations":[{"raw_affiliation_string":"Huawei Technologies Co. Ltd., Shenzhen, People\u2019s Republic of China","institution_ids":["https://openalex.org/I2250955327"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5044390347","display_name":"Julio Sahuquillo","orcid":"https://orcid.org/0000-0001-8630-4846"},"institutions":[{"id":"https://openalex.org/I60053951","display_name":"Universitat Polit\u00e8cnica de Val\u00e8ncia","ror":"https://ror.org/01460j859","country_code":"ES","type":"education","lineage":["https://openalex.org/I60053951"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Julio Sahuquillo","raw_affiliation_strings":["Dep. de Inform\u00e1tica de Sistemas y Computadores, Universitat Polit\u00e8cnica de Val\u00e8ncia, Val\u00e8ncia, Spain"],"affiliations":[{"raw_affiliation_string":"Dep. de Inform\u00e1tica de Sistemas y Computadores, Universitat Polit\u00e8cnica de Val\u00e8ncia, Val\u00e8ncia, Spain","institution_ids":["https://openalex.org/I60053951"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5091993995"],"corresponding_institution_ids":["https://openalex.org/I60053951"],"apc_list":{"value":1060,"currency":"GBP","value_usd":1300},"apc_paid":{"value":1060,"currency":"GBP","value_usd":1300},"fwci":0.0,"has_fulltext":true,"cited_by_count":0,"citation_normalized_percentile":{"value":0.05364218,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"10","issue":"1","first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8302434682846069},{"id":"https://openalex.org/keywords/non-volatile-random-access-memory","display_name":"Non-volatile random-access memory","score":0.7471789717674255},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.6171109080314636},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.5347040891647339},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5167252421379089},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.514840304851532},{"id":"https://openalex.org/keywords/cache-only-memory-architecture","display_name":"Cache-only memory architecture","score":0.5142390131950378},{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.49846744537353516},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.49477046728134155},{"id":"https://openalex.org/keywords/cache-pollution","display_name":"Cache pollution","score":0.4644029140472412},{"id":"https://openalex.org/keywords/registered-memory","display_name":"Registered memory","score":0.4593127369880676},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.44679194688796997},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.44202134013175964},{"id":"https://openalex.org/keywords/magnetoresistive-random-access-memory","display_name":"Magnetoresistive random-access memory","score":0.43703871965408325},{"id":"https://openalex.org/keywords/page-cache","display_name":"Page cache","score":0.4227522611618042},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.4074307978153229},{"id":"https://openalex.org/keywords/memory-refresh","display_name":"Memory refresh","score":0.3687867820262909},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.36407405138015747},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.36060428619384766},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.3363306522369385},{"id":"https://openalex.org/keywords/computer-memory","display_name":"Computer memory","score":0.3137884736061096},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.308998703956604},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.2592419385910034},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.12752965092658997}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8302434682846069},{"id":"https://openalex.org/C34172316","wikidata":"https://www.wikidata.org/wiki/Q499024","display_name":"Non-volatile random-access memory","level":5,"score":0.7471789717674255},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.6171109080314636},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.5347040891647339},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5167252421379089},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.514840304851532},{"id":"https://openalex.org/C3720319","wikidata":"https://www.wikidata.org/wiki/Q5015937","display_name":"Cache-only memory architecture","level":5,"score":0.5142390131950378},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.49846744537353516},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.49477046728134155},{"id":"https://openalex.org/C113166858","wikidata":"https://www.wikidata.org/wiki/Q5015981","display_name":"Cache pollution","level":5,"score":0.4644029140472412},{"id":"https://openalex.org/C93446704","wikidata":"https://www.wikidata.org/wiki/Q449328","display_name":"Registered memory","level":3,"score":0.4593127369880676},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.44679194688796997},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.44202134013175964},{"id":"https://openalex.org/C46891859","wikidata":"https://www.wikidata.org/wiki/Q1061546","display_name":"Magnetoresistive random-access memory","level":3,"score":0.43703871965408325},{"id":"https://openalex.org/C36340418","wikidata":"https://www.wikidata.org/wiki/Q7124288","display_name":"Page cache","level":5,"score":0.4227522611618042},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.4074307978153229},{"id":"https://openalex.org/C87907426","wikidata":"https://www.wikidata.org/wiki/Q6815755","display_name":"Memory refresh","level":4,"score":0.3687867820262909},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.36407405138015747},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.36060428619384766},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.3363306522369385},{"id":"https://openalex.org/C92855701","wikidata":"https://www.wikidata.org/wiki/Q5830907","display_name":"Computer memory","level":3,"score":0.3137884736061096},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.308998703956604},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.2592419385910034},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.12752965092658997}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1186/s40537-023-00761-0","is_oa":true,"landing_page_url":"http://dx.doi.org/10.1186/s40537-023-00761-0","pdf_url":"https://journalofbigdata.springeropen.com/counter/pdf/10.1186/s40537-023-00761-0","source":{"id":"https://openalex.org/S2737955091","display_name":"Journal Of Big Data","issn_l":"2196-1115","issn":["2196-1115"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Big Data","raw_type":"journal-article"},{"id":"pmh:oai:riunet.upv.es:10251/205507","is_oa":true,"landing_page_url":"http://hdl.handle.net/10251/205507","pdf_url":"https://riunet.upv.es/bitstream/10251/205507/1/AvarguesLurbe-SemperePetit%20-%20Main%20memory%20controller%20with%20multiple%20media%20technologies%20for%20big%20data....pdf","source":{"id":"https://openalex.org/S4306400639","display_name":"RiuNet (Universitat Polit\u00e8cnica de Val\u00e8ncia)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I60053951","host_organization_name":"Universitat Polit\u00e8cnica de Val\u00e8ncia","host_organization_lineage":["https://openalex.org/I60053951"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/publishedVersion"},{"id":"pmh:oai:doaj.org/article:bb7ffe324fd443c38ca90099ebb258a3","is_oa":true,"landing_page_url":"https://doaj.org/article/bb7ffe324fd443c38ca90099ebb258a3","pdf_url":null,"source":{"id":"https://openalex.org/S112646816","display_name":"SHILAP Revista de lepidopterolog\u00eda","issn_l":"0300-5267","issn":["0300-5267","2340-4078"],"is_oa":true,"is_in_doaj":true,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Journal of Big Data, Vol 10, Iss 1, Pp 1-19 (2023)","raw_type":"article"}],"best_oa_location":{"id":"doi:10.1186/s40537-023-00761-0","is_oa":true,"landing_page_url":"http://dx.doi.org/10.1186/s40537-023-00761-0","pdf_url":"https://journalofbigdata.springeropen.com/counter/pdf/10.1186/s40537-023-00761-0","source":{"id":"https://openalex.org/S2737955091","display_name":"Journal Of Big Data","issn_l":"2196-1115","issn":["2196-1115"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Big Data","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G3134727242","display_name":null,"funder_award_id":"TED2021-130233B-C32","funder_id":"https://openalex.org/F4320322930","funder_display_name":"Ministerio de Ciencia e Innovaci\u00f3n"},{"id":"https://openalex.org/G4942493322","display_name":null,"funder_award_id":"PID2021-123627OB-C51","funder_id":"https://openalex.org/F4320322930","funder_display_name":"Ministerio de Ciencia e Innovaci\u00f3n"},{"id":"https://openalex.org/G5333219320","display_name":null,"funder_award_id":"PID2021-123627OB-C51","funder_id":"https://openalex.org/F4320335322","funder_display_name":"European Regional Development Fund"},{"id":"https://openalex.org/G5396352330","display_name":null,"funder_award_id":"TED2021-130233B-C3","funder_id":"https://openalex.org/F4320322930","funder_display_name":"Ministerio de Ciencia e Innovaci\u00f3n"},{"id":"https://openalex.org/G8570012161","display_name":null,"funder_award_id":"unknown","funder_id":"https://openalex.org/F4320335322","funder_display_name":"European Regional Development Fund"}],"funders":[{"id":"https://openalex.org/F4320322183","display_name":"Huawei Technologies","ror":"https://ror.org/00cmhce21"},{"id":"https://openalex.org/F4320322930","display_name":"Ministerio de Ciencia e Innovaci\u00f3n","ror":"https://ror.org/034900433"},{"id":"https://openalex.org/F4320335322","display_name":"European Regional Development Fund","ror":"https://ror.org/00k4n6c32"}],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W4377238932.pdf","grobid_xml":"https://content.openalex.org/works/W4377238932.grobid-xml"},"referenced_works_count":40,"referenced_works":["https://openalex.org/W1559781097","https://openalex.org/W1993924043","https://openalex.org/W1994717635","https://openalex.org/W2006798699","https://openalex.org/W2028802049","https://openalex.org/W2038061869","https://openalex.org/W2072730350","https://openalex.org/W2102449048","https://openalex.org/W2104305170","https://openalex.org/W2118870365","https://openalex.org/W2125754106","https://openalex.org/W2127643145","https://openalex.org/W2147539449","https://openalex.org/W2147926533","https://openalex.org/W2155694951","https://openalex.org/W2158662664","https://openalex.org/W2166020518","https://openalex.org/W2294253319","https://openalex.org/W2294693415","https://openalex.org/W2553758973","https://openalex.org/W2625260175","https://openalex.org/W2757580917","https://openalex.org/W2808500658","https://openalex.org/W2856555045","https://openalex.org/W2903617882","https://openalex.org/W2916411819","https://openalex.org/W2924773594","https://openalex.org/W2949434654","https://openalex.org/W2953358830","https://openalex.org/W2999811406","https://openalex.org/W3033168371","https://openalex.org/W3033898041","https://openalex.org/W3100863146","https://openalex.org/W3148258531","https://openalex.org/W3217173480","https://openalex.org/W4230161130","https://openalex.org/W4250281317","https://openalex.org/W4292169167","https://openalex.org/W4296960830","https://openalex.org/W6678380782"],"related_works":["https://openalex.org/W4285257158","https://openalex.org/W2546565930","https://openalex.org/W3021597805","https://openalex.org/W4293159259","https://openalex.org/W2151951695","https://openalex.org/W1981423095","https://openalex.org/W3217323523","https://openalex.org/W2183575955","https://openalex.org/W2579594055","https://openalex.org/W4377238932"],"abstract_inverted_index":{"Abstract":[0],"SRAM":[1,200,246],"and":[2,18,60,101,141,171,178,203,254,256,262],"DRAM":[3],"memory":[4,13,24,37,46,51,56,73,92,96,150,161,166,197],"technologies":[5,53,167],"have":[6],"been":[7],"dominant":[8],"in":[9,195],"the":[10,22,40,69,75,83,86,91,102,126,134,142,145,180,183,196,215,226,234,239,245],"implementations":[11],"of":[12,26,42,71,122,136,144,182,217],"subsystems.":[14],"In":[15,152],"recent":[16],"years,":[17],"mainly":[19],"driven":[20],"by":[21,250,260],"huge":[23],"demands":[25],"big":[27],"data":[28],"applications,":[29],"NVRAM":[30,123,175],"technology":[31,93,111,147],"has":[32],"emerged":[33],"as":[34,119,169],"a":[35,109,120,160,191,199,204],"denser":[36],"technology,":[38],"enabling":[39],"design":[41,70],"new":[43],"hybrid":[44,72,76],"DRAM/NVRAM":[45],"hierarchies":[47],"that":[48,163,224],"combine":[49],"multiple":[50],"media":[52],"to":[54,68,89,117,124,154,173,219,243,252],"balance":[55],"capacity,":[57],"latency,":[58],"cost,":[59],"endurance.":[61],"Two":[62],"main":[63],"approaches":[64],"are":[65],"being":[66],"applied":[67],"hierarchies:":[74],"address":[77,105,185],"space":[78,106],"approach,":[79,107],"which":[80],"relies":[81],"on":[82],"programmer":[84],"or":[85,231],"operating":[87],"system":[88,258],"choose":[90],"where":[94,108],"each":[95,149],"page":[97],"should":[98],"be":[99],"stored;":[100],"(only)":[103],"NVM":[104,184],"faster":[110],"(e.g.":[112,138],"commodity":[113],"DRAM)":[114],"is":[115,233,241],"needed":[116],"acts":[118],"cache":[121,139,193,202,228,247],"boost":[125],"performance.":[127],"This":[128],"approach":[129],"presents":[130],"architectural":[131],"challenges":[132],"such":[133,168],"organization":[135],"metadata":[137],"tags)":[140],"selection":[143],"proper":[146],"for":[148],"component.":[151],"contrast":[153],"existing":[155],"approaches,":[156],"this":[157],"work":[158],"proposes":[159,190],"controller":[162],"leverages":[164],"novel":[165],"eDRAM":[170,230],"MRAM":[172,232],"mitigate":[174],"bus":[176],"contention":[177],"improve":[179,244],"performance":[181,259],"space.":[186],"The":[187,207],"devised":[188],"solution":[189],"two-level":[192],"hierarchy":[194],"controller:":[198],"sector":[201],"(x)RAM":[205,208,227],"cache.":[206],"cache,":[209],"much":[210],"denser,":[211],"helps":[212],"significantly":[213],"reduce":[214],"number":[216],"accesses":[218],"NVRAM.":[220],"Experimental":[221],"results":[222],"show":[223],"implementing":[225],"with":[229],"best":[235],"performing":[236],"approach.":[237],"Moreover,":[238],"eRAM":[240],"able":[242],"miss":[248],"penalty":[249],"up":[251],"50%":[253],"80%,":[255],"overall":[257],"15%":[261],"23%.":[263]},"counts_by_year":[],"updated_date":"2026-04-10T15:06:20.359241","created_date":"2025-10-10T00:00:00"}