{"id":"https://openalex.org/W2326925795","doi":"https://doi.org/10.1186/s13634-016-0336-0","title":"Instruction scheduling heuristic for an efficient FFT in VLIW processors with balanced resource usage","display_name":"Instruction scheduling heuristic for an efficient FFT in VLIW processors with balanced resource usage","publication_year":2016,"publication_date":"2016-03-31","ids":{"openalex":"https://openalex.org/W2326925795","doi":"https://doi.org/10.1186/s13634-016-0336-0","mag":"2326925795"},"language":"en","primary_location":{"id":"doi:10.1186/s13634-016-0336-0","is_oa":true,"landing_page_url":"https://doi.org/10.1186/s13634-016-0336-0","pdf_url":"https://asp-eurasipjournals.springeropen.com/track/pdf/10.1186/s13634-016-0336-0","source":{"id":"https://openalex.org/S35920007","display_name":"EURASIP Journal on Advances in Signal Processing","issn_l":"1687-6172","issn":["1687-6172","1687-6180"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"EURASIP Journal on Advances in Signal Processing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://asp-eurasipjournals.springeropen.com/track/pdf/10.1186/s13634-016-0336-0","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5009645716","display_name":"Mounir Bahtat","orcid":"https://orcid.org/0000-0003-3032-6792"},"institutions":[{"id":"https://openalex.org/I119856527","display_name":"Cadi Ayyad University","ror":"https://ror.org/04xf6nm78","country_code":"MA","type":"education","lineage":["https://openalex.org/I119856527"]}],"countries":["MA"],"is_corresponding":true,"raw_author_name":"Mounir Bahtat","raw_affiliation_strings":["LGECOS Lab, ENSA-Marrakech of the Cadi Ayyad University, Marrakech, Morocco"],"raw_orcid":"https://orcid.org/0000-0003-3032-6792","affiliations":[{"raw_affiliation_string":"LGECOS Lab, ENSA-Marrakech of the Cadi Ayyad University, Marrakech, Morocco","institution_ids":["https://openalex.org/I119856527"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059874562","display_name":"Sa\u00efd Belkouch","orcid":null},"institutions":[{"id":"https://openalex.org/I119856527","display_name":"Cadi Ayyad University","ror":"https://ror.org/04xf6nm78","country_code":"MA","type":"education","lineage":["https://openalex.org/I119856527"]}],"countries":["MA"],"is_corresponding":false,"raw_author_name":"Said Belkouch","raw_affiliation_strings":["LGECOS Lab, ENSA-Marrakech of the Cadi Ayyad University, Marrakech, Morocco"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LGECOS Lab, ENSA-Marrakech of the Cadi Ayyad University, Marrakech, Morocco","institution_ids":["https://openalex.org/I119856527"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065028803","display_name":"Philippe Elleaume","orcid":null},"institutions":[{"id":"https://openalex.org/I4210140930","display_name":"Thales (France)","ror":"https://ror.org/04emwm605","country_code":"FR","type":"company","lineage":["https://openalex.org/I4210140930"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Philippe Elleaume","raw_affiliation_strings":["Thales Air Systems, Paris, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Thales Air Systems, Paris, France","institution_ids":["https://openalex.org/I4210140930"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110085057","display_name":"Philippe Le Gall","orcid":"https://orcid.org/0000-0002-3882-6970"},"institutions":[{"id":"https://openalex.org/I4210140930","display_name":"Thales (France)","ror":"https://ror.org/04emwm605","country_code":"FR","type":"company","lineage":["https://openalex.org/I4210140930"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Philippe Le Gall","raw_affiliation_strings":["Thales Air Systems, Paris, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Thales Air Systems, Paris, France","institution_ids":["https://openalex.org/I4210140930"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5009645716"],"corresponding_institution_ids":["https://openalex.org/I119856527"],"apc_list":{"value":1140,"currency":"GBP","value_usd":1398},"apc_paid":{"value":1140,"currency":"GBP","value_usd":1398},"fwci":0.641,"has_fulltext":true,"cited_by_count":11,"citation_normalized_percentile":{"value":0.66054044,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":"2016","issue":"1","first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-long-instruction-word","display_name":"Very long instruction word","score":0.9050190448760986},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8577704429626465},{"id":"https://openalex.org/keywords/fast-fourier-transform","display_name":"Fast Fourier transform","score":0.7580689191818237},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.7377820014953613},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.5397736430168152},{"id":"https://openalex.org/keywords/twiddle-factor","display_name":"Twiddle factor","score":0.5289530754089355},{"id":"https://openalex.org/keywords/digital-signal-processor","display_name":"Digital signal processor","score":0.4767414331436157},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.4177112281322479},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.4151984751224518},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.4102894067764282},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.32143816351890564},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.305181622505188},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.1644982397556305}],"concepts":[{"id":"https://openalex.org/C170595534","wikidata":"https://www.wikidata.org/wiki/Q249743","display_name":"Very long instruction word","level":2,"score":0.9050190448760986},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8577704429626465},{"id":"https://openalex.org/C75172450","wikidata":"https://www.wikidata.org/wiki/Q623950","display_name":"Fast Fourier transform","level":2,"score":0.7580689191818237},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.7377820014953613},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.5397736430168152},{"id":"https://openalex.org/C4697666","wikidata":"https://www.wikidata.org/wiki/Q7857913","display_name":"Twiddle factor","level":5,"score":0.5289530754089355},{"id":"https://openalex.org/C161611012","wikidata":"https://www.wikidata.org/wiki/Q106370","display_name":"Digital signal processor","level":3,"score":0.4767414331436157},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.4177112281322479},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.4151984751224518},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.4102894067764282},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.32143816351890564},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.305181622505188},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.1644982397556305},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C203024314","wikidata":"https://www.wikidata.org/wiki/Q1365258","display_name":"Fourier analysis","level":3,"score":0.0},{"id":"https://openalex.org/C102519508","wikidata":"https://www.wikidata.org/wiki/Q6520159","display_name":"Fourier transform","level":2,"score":0.0},{"id":"https://openalex.org/C166386157","wikidata":"https://www.wikidata.org/wiki/Q1477735","display_name":"Short-time Fourier transform","level":4,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1186/s13634-016-0336-0","is_oa":true,"landing_page_url":"https://doi.org/10.1186/s13634-016-0336-0","pdf_url":"https://asp-eurasipjournals.springeropen.com/track/pdf/10.1186/s13634-016-0336-0","source":{"id":"https://openalex.org/S35920007","display_name":"EURASIP Journal on Advances in Signal Processing","issn_l":"1687-6172","issn":["1687-6172","1687-6180"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"EURASIP Journal on Advances in Signal Processing","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1186/s13634-016-0336-0","is_oa":true,"landing_page_url":"https://doi.org/10.1186/s13634-016-0336-0","pdf_url":"https://asp-eurasipjournals.springeropen.com/track/pdf/10.1186/s13634-016-0336-0","source":{"id":"https://openalex.org/S35920007","display_name":"EURASIP Journal on Advances in Signal Processing","issn_l":"1687-6172","issn":["1687-6172","1687-6180"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"EURASIP Journal on Advances in Signal Processing","raw_type":"journal-article"},"sustainable_development_goals":[{"score":0.44999998807907104,"display_name":"Decent work and economic growth","id":"https://metadata.un.org/sdg/8"}],"awards":[],"funders":[],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2326925795.pdf","grobid_xml":"https://content.openalex.org/works/W2326925795.grobid-xml"},"referenced_works_count":44,"referenced_works":["https://openalex.org/W149408741","https://openalex.org/W1506585561","https://openalex.org/W1509351983","https://openalex.org/W1515370650","https://openalex.org/W1631114303","https://openalex.org/W1748298788","https://openalex.org/W1866830630","https://openalex.org/W1923763959","https://openalex.org/W1963718362","https://openalex.org/W1972117411","https://openalex.org/W1988864654","https://openalex.org/W1991297274","https://openalex.org/W2005055779","https://openalex.org/W2061171222","https://openalex.org/W2073086065","https://openalex.org/W2073671734","https://openalex.org/W2081249859","https://openalex.org/W2104865560","https://openalex.org/W2106805276","https://openalex.org/W2117900096","https://openalex.org/W2123412205","https://openalex.org/W2129151831","https://openalex.org/W2129962996","https://openalex.org/W2135031801","https://openalex.org/W2137552546","https://openalex.org/W2143840042","https://openalex.org/W2144197347","https://openalex.org/W2144412928","https://openalex.org/W2150253309","https://openalex.org/W2157758640","https://openalex.org/W2159501214","https://openalex.org/W2159742333","https://openalex.org/W2163394971","https://openalex.org/W2164197394","https://openalex.org/W2164834346","https://openalex.org/W2168922271","https://openalex.org/W2186518949","https://openalex.org/W2531968117","https://openalex.org/W2532448721","https://openalex.org/W2544887372","https://openalex.org/W3143608323","https://openalex.org/W4231413142","https://openalex.org/W4251142838","https://openalex.org/W4253299461"],"related_works":["https://openalex.org/W2351401773","https://openalex.org/W2149121524","https://openalex.org/W1984254719","https://openalex.org/W2371538653","https://openalex.org/W2151986570","https://openalex.org/W2031343199","https://openalex.org/W2144806327","https://openalex.org/W2093169932","https://openalex.org/W4229456379","https://openalex.org/W2394044501"],"abstract_inverted_index":{"The":[0,118,184],"fast":[1,46],"Fourier":[2],"transform":[3],"(FFT)":[4],"is":[5,17,55,194,201],"perhaps":[6],"today\u2019s":[7],"most":[8,178],"ubiquitous":[9],"algorithm":[10],"used":[11],"with":[12],"digital":[13,89],"data;":[14],"hence,":[15],"it":[16],"still":[18],"being":[19],"studied":[20],"extensively.":[21],"Besides":[22],"the":[23,27,31,52,57,67,104,111,136,140,160,177,213,216],"benefit":[24],"of":[25,51,99,115,162,168,209],"reducing":[26],"arithmetic":[28],"count":[29],"in":[30,56,66,97],"FFT":[32,80,182,185],"algorithm,":[33,199],"memory":[34,60,113],"references":[35,69],"and":[36,47,65,109,126,145,180,219,223],"scheme\u2019s":[37],"projection":[38],"on":[39,82,139,150],"processor\u2019s":[40],"architecture":[41],"are":[42],"critical":[43],"for":[44,135,212],"a":[45,78,121,131,151,195],"efficient":[48,207],"implementation.":[49],"One":[50],"main":[53],"bottlenecks":[54],"long":[58,85],"latency":[59],"accesses":[61,114],"to":[62,70,103,110,176,203],"butterflies\u2019":[63],"legs":[64],"redundant":[68],"twiddle":[71,116],"factors.":[72,117],"In":[73],"this":[74],"paper,":[75],"we":[76,129],"describe":[77],"new":[79],"implementation":[81,133],"high-end":[83],"very":[84],"instruction":[86],"word":[87],"(VLIW)":[88],"signal":[90],"processors":[91],"(DSP),":[92],"which":[93,200],"presents":[94],"improved":[95],"performance":[96],"terms":[98],"clock":[100,163,221],"cycles":[101,164,222],"due":[102],"resulting":[105],"low-level":[106],"resource":[107],"balance":[108],"reduced":[112],"method":[119,158],"introduces":[120],"tradeoff":[122],"parameter":[123],"between":[124],"accuracy":[125],"speed.":[127],"Additionally,":[128],"suggest":[130],"cache-efficient":[132],"methodology":[134],"FFT,":[137,214],"dependently":[138],"provided":[141],"VLIW":[142,153,210],"hardware":[143],"resources":[144],"cache":[146],"structure.":[147],"Experimental":[148],"results":[149],"TI":[152],"DSP":[154],"show":[155],"that":[156],"our":[157],"reduces":[159],"number":[161],"by":[165],"an":[166,189,205],"average":[167],"51":[169],"%":[170],"(2":[171],"times":[172],"acceleration)":[173],"when":[174],"compared":[175],"assembly-optimized":[179],"vendor-tuned":[181],"libraries.":[183],"was":[186],"generated":[187],"using":[188],"instruction-level":[190],"scheduling":[191,198],"heuristic.":[192],"It":[193],"modulo-based":[196],"register-sensitive":[197],"able":[202],"compute":[204],"aggressively":[206],"sequence":[208],"instructions":[211],"maximizing":[215],"parallelism":[217],"rate":[218],"minimizing":[220],"register":[224],"usage.":[225]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2026-06-19T15:47:20.252518","created_date":"2025-10-10T00:00:00"}
