{"id":"https://openalex.org/W2131391877","doi":"https://doi.org/10.1155/s1110865703301015","title":"A Methodology for Rapid Prototyping Peak-Constrained Least-Squares Bit-Serial Finite Impulse Response Filters in FPGAs","display_name":"A Methodology for Rapid Prototyping Peak-Constrained Least-Squares Bit-Serial Finite Impulse Response Filters in FPGAs","publication_year":2003,"publication_date":"2003-05-20","ids":{"openalex":"https://openalex.org/W2131391877","doi":"https://doi.org/10.1155/s1110865703301015","mag":"2131391877"},"language":"en","primary_location":{"id":"doi:10.1155/s1110865703301015","is_oa":true,"landing_page_url":"https://doi.org/10.1155/s1110865703301015","pdf_url":"https://asp-eurasipjournals.springeropen.com/counter/pdf/10.1155/S1110865703301015","source":{"id":"https://openalex.org/S35920007","display_name":"EURASIP Journal on Advances in Signal Processing","issn_l":"1110-8657","issn":["1110-8657","1687-0433","1687-6172","1687-6180"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"EURASIP Journal on Advances in Signal Processing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://asp-eurasipjournals.springeropen.com/counter/pdf/10.1155/S1110865703301015","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5080279481","display_name":"A. Carreira","orcid":null},"institutions":[{"id":"https://openalex.org/I168635309","display_name":"University of Calgary","ror":"https://ror.org/03yjb2x39","country_code":"CA","type":"education","lineage":["https://openalex.org/I168635309"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Alex Carreira","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Calgary, 2500 University Drive Calgary N.W., Calgary, Alberta, T2N 1N4, Canada","Department of Electrical and Computer Engineering University of Calgary, Calgary, Alberta, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Calgary, 2500 University Drive Calgary N.W., Calgary, Alberta, T2N 1N4, Canada","institution_ids":["https://openalex.org/I168635309"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering University of Calgary, Calgary, Alberta, Canada","institution_ids":["https://openalex.org/I168635309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046902116","display_name":"T.W. Fox","orcid":null},"institutions":[{"id":"https://openalex.org/I168635309","display_name":"University of Calgary","ror":"https://ror.org/03yjb2x39","country_code":"CA","type":"education","lineage":["https://openalex.org/I168635309"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Trevor W. Fox","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Calgary, 2500 University Drive Calgary N.W., Calgary, Alberta, T2N 1N4, Canada","Department of Electrical and Computer Engineering University of Calgary, Calgary, Alberta, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Calgary, 2500 University Drive Calgary N.W., Calgary, Alberta, T2N 1N4, Canada","institution_ids":["https://openalex.org/I168635309"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering University of Calgary, Calgary, Alberta, Canada","institution_ids":["https://openalex.org/I168635309"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5005447330","display_name":"L.E. Turner","orcid":null},"institutions":[{"id":"https://openalex.org/I168635309","display_name":"University of Calgary","ror":"https://ror.org/03yjb2x39","country_code":"CA","type":"education","lineage":["https://openalex.org/I168635309"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Laurence E. Turner","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Calgary, 2500 University Drive Calgary N.W., Calgary, Alberta, T2N 1N4, Canada","Department of Electrical and Computer Engineering University of Calgary, Calgary, Alberta, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Calgary, 2500 University Drive Calgary N.W., Calgary, Alberta, T2N 1N4, Canada","institution_ids":["https://openalex.org/I168635309"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering University of Calgary, Calgary, Alberta, Canada","institution_ids":["https://openalex.org/I168635309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5080279481"],"corresponding_institution_ids":["https://openalex.org/I168635309"],"apc_list":{"value":1665,"currency":"USD","value_usd":1665},"apc_paid":{"value":1665,"currency":"USD","value_usd":1665},"fwci":0.8028,"has_fulltext":true,"cited_by_count":3,"citation_normalized_percentile":{"value":0.76618123,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"2003","issue":"6","first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11233","display_name":"Advanced Adaptive Filtering Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2206","display_name":"Computational Mechanics"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7456144094467163},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7108620405197144},{"id":"https://openalex.org/keywords/finite-impulse-response","display_name":"Finite impulse response","score":0.6112892627716064},{"id":"https://openalex.org/keywords/bitstream","display_name":"Bitstream","score":0.5815690755844116},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.46353936195373535},{"id":"https://openalex.org/keywords/virtex","display_name":"Virtex","score":0.43629762530326843},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.33765003085136414},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2711781859397888},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.08886298537254333}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7456144094467163},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7108620405197144},{"id":"https://openalex.org/C198386975","wikidata":"https://www.wikidata.org/wiki/Q117785","display_name":"Finite impulse response","level":2,"score":0.6112892627716064},{"id":"https://openalex.org/C136695289","wikidata":"https://www.wikidata.org/wiki/Q415568","display_name":"Bitstream","level":3,"score":0.5815690755844116},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.46353936195373535},{"id":"https://openalex.org/C2777674469","wikidata":"https://www.wikidata.org/wiki/Q20741011","display_name":"Virtex","level":3,"score":0.43629762530326843},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.33765003085136414},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2711781859397888},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.08886298537254333}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1155/s1110865703301015","is_oa":true,"landing_page_url":"https://doi.org/10.1155/s1110865703301015","pdf_url":"https://asp-eurasipjournals.springeropen.com/counter/pdf/10.1155/S1110865703301015","source":{"id":"https://openalex.org/S35920007","display_name":"EURASIP Journal on Advances in Signal Processing","issn_l":"1110-8657","issn":["1110-8657","1687-0433","1687-6172","1687-6180"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"EURASIP Journal on Advances in Signal Processing","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1155/s1110865703301015","is_oa":true,"landing_page_url":"https://doi.org/10.1155/s1110865703301015","pdf_url":"https://asp-eurasipjournals.springeropen.com/counter/pdf/10.1155/S1110865703301015","source":{"id":"https://openalex.org/S35920007","display_name":"EURASIP Journal on Advances in Signal Processing","issn_l":"1110-8657","issn":["1110-8657","1687-0433","1687-6172","1687-6180"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"EURASIP Journal on Advances in Signal Processing","raw_type":"journal-article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8199999928474426}],"awards":[],"funders":[],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2131391877.pdf","grobid_xml":"https://content.openalex.org/works/W2131391877.grobid-xml"},"referenced_works_count":19,"referenced_works":["https://openalex.org/W76355380","https://openalex.org/W146906408","https://openalex.org/W157706557","https://openalex.org/W160693069","https://openalex.org/W590953167","https://openalex.org/W1507071772","https://openalex.org/W1645709778","https://openalex.org/W2011297197","https://openalex.org/W2011652254","https://openalex.org/W2032681674","https://openalex.org/W2100381433","https://openalex.org/W2134440875","https://openalex.org/W2135660453","https://openalex.org/W2137244650","https://openalex.org/W2155542547","https://openalex.org/W2293599327","https://openalex.org/W4243646874","https://openalex.org/W6653352794","https://openalex.org/W6679868426"],"related_works":["https://openalex.org/W4319430423","https://openalex.org/W4390224957","https://openalex.org/W4323831234","https://openalex.org/W2544043553","https://openalex.org/W4311839959","https://openalex.org/W49599899","https://openalex.org/W3217774925","https://openalex.org/W1587494897","https://openalex.org/W2121309702","https://openalex.org/W2009741039"],"abstract_inverted_index":{"Area-efficient":[0],"peak-constrained":[1],"least-squares":[2],"(PCLS)":[3],"bit-serial":[4],"finite":[5],"impulse":[6],"response":[7,114],"(FIR)":[8],"filter":[9],"implementations":[10],"can":[11,119],"be":[12,92,120],"rapidly":[13],"prototyped":[14],"in":[15,25,97,142],"field":[16],"programmable":[17],"gate":[18],"arrays":[19],"(FPGA)":[20],"with":[21,37,122],"the":[22,31,68,75,98,104,112,123,136],"methodology":[23],"presented":[24],"this":[26],"paper.":[27],"Faster":[28],"generation":[29,84],"of":[30,60,138],"FPGA":[32,71],"configuration":[33,72,80],"bitstream":[34],"is":[35,57,127],"possible":[36,129],"a":[38,58,95],"new":[39,79],"application-specific":[40],"mapping":[41,52],"and":[42,53,115],"placement":[43,54],"method":[44],"that":[45,63,110],"uses":[46],"JBits":[47,56],"to":[48,77,91,130],"avoid":[49],"conventional":[50],"general-purpose":[51],"tools.":[55],"set":[59],"Java":[61],"classes":[62],"provide":[64],"an":[65],"interface":[66],"into":[67],"Xilinx":[69],"Virtex":[70],"bitstream,":[73],"allowing":[74],"user":[76],"generate":[78],"bitstreams.":[81],"PCLS":[82,124],"coefficient":[83],"allows":[85],"passband-to-stopband":[86],"energy":[87],"ratio":[88],"(PSR)":[89],"performance":[90],"traded":[93],"for":[94],"reduction":[96],"filter's":[99],"hardware":[100,116],"cost":[101,117],"without":[102],"altering":[103],"minimum":[105],"stopband":[106],"attenuation.":[107],"Fixed-point":[108],"coefficients":[109,140],"meet":[111,131],"frequency":[113],"specifications":[118,133],"generated":[121,141],"method.":[125],"It":[126],"not":[128],"these":[132],"solely":[134],"by":[135],"quantization":[137],"floating-point":[139],"other":[143],"methods.":[144]},"counts_by_year":[],"updated_date":"2026-08-04T08:18:43.703281","created_date":"2025-10-10T00:00:00"}