{"id":"https://openalex.org/W2048922435","doi":"https://doi.org/10.1155/asp/2006/28636","title":"Macrocell Builder: IP-Block-Based Design Environment for High-Throughput VLSI Dedicated Digital Signal Processing Systems","display_name":"Macrocell Builder: IP-Block-Based Design Environment for High-Throughput VLSI Dedicated Digital Signal Processing Systems","publication_year":2006,"publication_date":"2006-01-30","ids":{"openalex":"https://openalex.org/W2048922435","doi":"https://doi.org/10.1155/asp/2006/28636","mag":"2048922435"},"language":"en","primary_location":{"id":"doi:10.1155/asp/2006/28636","is_oa":true,"landing_page_url":"https://doi.org/10.1155/asp/2006/28636","pdf_url":"https://asp-eurasipjournals.springeropen.com/counter/pdf/10.1155/ASP/2006/28636","source":{"id":"https://openalex.org/S35920007","display_name":"EURASIP Journal on Advances in Signal Processing","issn_l":"1687-6172","issn":["1687-6172","1687-6180"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"EURASIP Journal on Advances in Signal Processing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://asp-eurasipjournals.springeropen.com/counter/pdf/10.1155/ASP/2006/28636","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5109240766","display_name":"Nacer-Eddine Zergainoh","orcid":null},"institutions":[{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Nacer-Eddine Zergainoh","raw_affiliation_strings":["TIMA Laboratory, National Polytechnique Institute of Grenoble, 46 Avenue F\u00e9lix Viallet, Grenoble Cedex 1, 38031, France","TIMA Laboratory, National Polytechnique Institute of Grenoble, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TIMA Laboratory, National Polytechnique Institute of Grenoble, 46 Avenue F\u00e9lix Viallet, Grenoble Cedex 1, 38031, France","institution_ids":["https://openalex.org/I4210087012"]},{"raw_affiliation_string":"TIMA Laboratory, National Polytechnique Institute of Grenoble, France","institution_ids":["https://openalex.org/I4210087012"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016985732","display_name":"L. Tambour","orcid":null},"institutions":[{"id":"https://openalex.org/I251321805","display_name":"Agropolis International","ror":"https://ror.org/00txxwv34","country_code":"FR","type":"other","lineage":["https://openalex.org/I251321805"]},{"id":"https://openalex.org/I131077856","display_name":"Centre de Coop\u00e9ration Internationale en Recherche Agronomique pour le D\u00e9veloppement","ror":"https://ror.org/05kpkpg04","country_code":"FR","type":"facility","lineage":["https://openalex.org/I131077856"]},{"id":"https://openalex.org/I131827901","display_name":"STMicroelectronics (Switzerland)","ror":"https://ror.org/00wm3b005","country_code":"CH","type":"company","lineage":["https://openalex.org/I131827901"]},{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I4210104693","display_name":"STMicroelectronics (France)","ror":"https://ror.org/01c74sd89","country_code":"FR","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210104693"]}],"countries":["CH","FR"],"is_corresponding":false,"raw_author_name":"Ludovic Tambour","raw_affiliation_strings":["CIRAD, TA 40/01, avenue Agropolis Lavalette, Montpellier Cedex 5, 34398, France","ST Microelectronics, 850 Rue Jean Monnet, Crolles Cedex, 38926, France","TIMA Laboratory, National Polytechnique Institute of Grenoble, 46 Avenue F\u00e9lix Viallet, Grenoble Cedex 1, 38031, France","TIMA Laboratory, National Polytechnique Institute of Grenoble, France","ST Microelectronics, Crolles Cedex, France","CIRAD, TA 40/01, avenue Agropolis Lavalette, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"CIRAD, TA 40/01, avenue Agropolis Lavalette, Montpellier Cedex 5, 34398, France","institution_ids":["https://openalex.org/I131077856","https://openalex.org/I251321805"]},{"raw_affiliation_string":"ST Microelectronics, 850 Rue Jean Monnet, Crolles Cedex, 38926, France","institution_ids":["https://openalex.org/I131827901"]},{"raw_affiliation_string":"TIMA Laboratory, National Polytechnique Institute of Grenoble, 46 Avenue F\u00e9lix Viallet, Grenoble Cedex 1, 38031, France","institution_ids":["https://openalex.org/I4210087012"]},{"raw_affiliation_string":"TIMA Laboratory, National Polytechnique Institute of Grenoble, France","institution_ids":["https://openalex.org/I4210087012"]},{"raw_affiliation_string":"ST Microelectronics, Crolles Cedex, France","institution_ids":["https://openalex.org/I4210104693"]},{"raw_affiliation_string":"CIRAD, TA 40/01, avenue Agropolis Lavalette, France","institution_ids":["https://openalex.org/I251321805","https://openalex.org/I131077856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111440581","display_name":"Pascal Urard","orcid":null},"institutions":[{"id":"https://openalex.org/I4210104693","display_name":"STMicroelectronics (France)","ror":"https://ror.org/01c74sd89","country_code":"FR","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210104693"]},{"id":"https://openalex.org/I131827901","display_name":"STMicroelectronics (Switzerland)","ror":"https://ror.org/00wm3b005","country_code":"CH","type":"company","lineage":["https://openalex.org/I131827901"]}],"countries":["CH","FR"],"is_corresponding":false,"raw_author_name":"Pascal Urard","raw_affiliation_strings":["ST Microelectronics, 850 Rue Jean Monnet, Crolles Cedex, 38926, France","ST Microelectronics, Crolles Cedex, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"ST Microelectronics, 850 Rue Jean Monnet, Crolles Cedex, 38926, France","institution_ids":["https://openalex.org/I131827901"]},{"raw_affiliation_string":"ST Microelectronics, Crolles Cedex, France","institution_ids":["https://openalex.org/I4210104693"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5109232810","display_name":"Ahmed Amine Jerraya","orcid":null},"institutions":[{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Ahmed Amine Jerraya","raw_affiliation_strings":["TIMA Laboratory, National Polytechnique Institute of Grenoble, 46 Avenue F\u00e9lix Viallet, Grenoble Cedex 1, 38031, France","TIMA Laboratory, National Polytechnique Institute of Grenoble, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TIMA Laboratory, National Polytechnique Institute of Grenoble, 46 Avenue F\u00e9lix Viallet, Grenoble Cedex 1, 38031, France","institution_ids":["https://openalex.org/I4210087012"]},{"raw_affiliation_string":"TIMA Laboratory, National Polytechnique Institute of Grenoble, France","institution_ids":["https://openalex.org/I4210087012"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5109240766"],"corresponding_institution_ids":["https://openalex.org/I4210087012"],"apc_list":{"value":1140,"currency":"GBP","value_usd":1398},"apc_paid":{"value":1140,"currency":"GBP","value_usd":1398},"fwci":1.1374,"has_fulltext":true,"cited_by_count":5,"citation_normalized_percentile":{"value":0.7752443,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"2006","issue":"1","first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8158644437789917},{"id":"https://openalex.org/keywords/netlist","display_name":"Netlist","score":0.7579053640365601},{"id":"https://openalex.org/keywords/systemc","display_name":"SystemC","score":0.6556084156036377},{"id":"https://openalex.org/keywords/macrocell","display_name":"Macrocell","score":0.6304518580436707},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6208683252334595},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.6131005883216858},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.5785751342773438},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.5306628942489624},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5261670351028442},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.5255873799324036},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.4982423782348633},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4641491174697876},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.43231919407844543},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.24271029233932495},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10804465413093567}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8158644437789917},{"id":"https://openalex.org/C177650935","wikidata":"https://www.wikidata.org/wiki/Q1760303","display_name":"Netlist","level":2,"score":0.7579053640365601},{"id":"https://openalex.org/C2776928060","wikidata":"https://www.wikidata.org/wiki/Q1753563","display_name":"SystemC","level":2,"score":0.6556084156036377},{"id":"https://openalex.org/C2778291847","wikidata":"https://www.wikidata.org/wiki/Q1163937","display_name":"Macrocell","level":3,"score":0.6304518580436707},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6208683252334595},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.6131005883216858},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.5785751342773438},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.5306628942489624},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5261670351028442},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.5255873799324036},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.4982423782348633},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4641491174697876},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.43231919407844543},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.24271029233932495},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10804465413093567},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C68649174","wikidata":"https://www.wikidata.org/wiki/Q1379116","display_name":"Base station","level":2,"score":0.0}],"mesh":[],"locations_count":4,"locations":[{"id":"doi:10.1155/asp/2006/28636","is_oa":true,"landing_page_url":"https://doi.org/10.1155/asp/2006/28636","pdf_url":"https://asp-eurasipjournals.springeropen.com/counter/pdf/10.1155/ASP/2006/28636","source":{"id":"https://openalex.org/S35920007","display_name":"EURASIP Journal on Advances in Signal Processing","issn_l":"1687-6172","issn":["1687-6172","1687-6180"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"EURASIP Journal on Advances in Signal Processing","raw_type":"journal-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.372.1539","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.372.1539","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://asp.eurasipjournals.com/content/pdf/1687-6180-2006-028636.pdf","raw_type":"text"},{"id":"pmh:oai:HAL:hal-00079185v1","is_oa":false,"landing_page_url":"https://hal.science/hal-00079185","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Journal on Applied Signal Processing, 2006, 2006, pp.Article ID 28636, 1-11. ⟨10.1155/ASP/2006/28636⟩","raw_type":"Journal articles"},{"id":"pmh:oai:doaj.org/article:2aa0f66f836f4924bf9d81bba5518263","is_oa":true,"landing_page_url":"https://doaj.org/article/2aa0f66f836f4924bf9d81bba5518263","pdf_url":null,"source":{"id":"https://openalex.org/S4306401280","display_name":"DOAJ (DOAJ: Directory of Open Access Journals)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-sa","license_id":"https://openalex.org/licenses/cc-by-sa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"EURASIP Journal on Advances in Signal Processing, Vol 2006, Iss 1, p 028636 (2006)","raw_type":"article"}],"best_oa_location":{"id":"doi:10.1155/asp/2006/28636","is_oa":true,"landing_page_url":"https://doi.org/10.1155/asp/2006/28636","pdf_url":"https://asp-eurasipjournals.springeropen.com/counter/pdf/10.1155/ASP/2006/28636","source":{"id":"https://openalex.org/S35920007","display_name":"EURASIP Journal on Advances in Signal Processing","issn_l":"1687-6172","issn":["1687-6172","1687-6180"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"EURASIP Journal on Advances in Signal Processing","raw_type":"journal-article"},"sustainable_development_goals":[{"score":0.49000000953674316,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2048922435.pdf","grobid_xml":"https://content.openalex.org/works/W2048922435.grobid-xml"},"referenced_works_count":30,"referenced_works":["https://openalex.org/W1496267491","https://openalex.org/W1498455513","https://openalex.org/W1500906976","https://openalex.org/W1501488688","https://openalex.org/W1574303240","https://openalex.org/W1760784370","https://openalex.org/W1999090606","https://openalex.org/W2014290146","https://openalex.org/W2047196187","https://openalex.org/W2061341864","https://openalex.org/W2062251140","https://openalex.org/W2090242529","https://openalex.org/W2091528902","https://openalex.org/W2099089225","https://openalex.org/W2102386141","https://openalex.org/W2120771707","https://openalex.org/W2122712122","https://openalex.org/W2126319516","https://openalex.org/W2127009070","https://openalex.org/W2132752616","https://openalex.org/W2138612658","https://openalex.org/W2150301947","https://openalex.org/W2155256384","https://openalex.org/W2163558621","https://openalex.org/W2170480266","https://openalex.org/W2503657378","https://openalex.org/W2586392344","https://openalex.org/W2736014057","https://openalex.org/W4205317033","https://openalex.org/W4240822846"],"related_works":["https://openalex.org/W2752828786","https://openalex.org/W4235515009","https://openalex.org/W2242433395","https://openalex.org/W2544073398","https://openalex.org/W2548514518","https://openalex.org/W2171413119","https://openalex.org/W2579932084","https://openalex.org/W2543290882","https://openalex.org/W1603163876","https://openalex.org/W2133642747"],"abstract_inverted_index":{"We":[0],"propose":[1],"an":[2],"efficient":[3,96],"IP-block-based":[4],"design":[5],"environment":[6],"for":[7],"high-throughput":[8],"VLSI":[9],"systems.":[10,87],"The":[11,31,62,77,88],"flow":[12,78],"generates":[13],"SystemC":[14],"register-transfer-level":[15],"(RTL)":[16],"architecture,":[17],"starting":[18],"from":[19],"a":[20,26,51],"Matlab":[21],"functional":[22,29],"model":[23,33],"described":[24],"as":[25],"netlist":[27],"of":[28,45,58,105],"IP.":[30,61],"refinement":[32],"inserts":[34,50],"automatically":[35],"control":[36,52,75],"structures":[37],"to":[38,54,101],"manage":[39],"delays":[40,63],"induced":[41],"by":[42,67,70],"the":[43,56,74,92],"use":[44],"RTL":[46,97],"IPs.":[47],"It":[48],"also":[49],"structure":[53],"coordinate":[55],"execution":[57],"parallel":[59],"clocked":[60],"may":[64],"be":[65],"managed":[66],"registers":[68],"or":[69],"counters":[71],"included":[72],"in":[73,83],"structure.":[76],"has":[79],"been":[80],"used":[81],"successfully":[82],"three":[84],"real-world":[85],"DSP":[86],"experimentations":[89],"show":[90],"that":[91],"approach":[93],"can":[94],"produce":[95],"architecture":[98],"and":[99],"allows":[100],"save":[102],"huge":[103],"amount":[104],"time.":[106]},"counts_by_year":[{"year":2012,"cited_by_count":1}],"updated_date":"2026-05-07T13:39:58.223016","created_date":"2025-10-10T00:00:00"}