{"id":"https://openalex.org/W2068911409","doi":"https://doi.org/10.1155/2014/923618","title":"High Throughput Pseudorandom Number Generator Based on Variable Argument Unified Hyperchaos","display_name":"High Throughput Pseudorandom Number Generator Based on Variable Argument Unified Hyperchaos","publication_year":2014,"publication_date":"2014-07-07","ids":{"openalex":"https://openalex.org/W2068911409","doi":"https://doi.org/10.1155/2014/923618","mag":"2068911409"},"language":"en","primary_location":{"id":"doi:10.1155/2014/923618","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2014/923618","pdf_url":null,"source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://doi.org/10.1155/2014/923618","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5115597247","display_name":"Kaiyu Wang","orcid":"https://orcid.org/0009-0007-8805-1839"},"institutions":[{"id":"https://openalex.org/I27357992","display_name":"Dalian University of Technology","ror":"https://ror.org/023hj5876","country_code":"CN","type":"education","lineage":["https://openalex.org/I27357992"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Kaiyu Wang","raw_affiliation_strings":["Department of Electronic Engineering, Dalian University of Technology, Gaoxinyuanqu Linggong Road 2, Dalian 116024, China"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, Dalian University of Technology, Gaoxinyuanqu Linggong Road 2, Dalian 116024, China","institution_ids":["https://openalex.org/I27357992"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5024368076","display_name":"Qingxin Yan","orcid":"https://orcid.org/0000-0002-6486-2262"},"institutions":[{"id":"https://openalex.org/I27357992","display_name":"Dalian University of Technology","ror":"https://ror.org/023hj5876","country_code":"CN","type":"education","lineage":["https://openalex.org/I27357992"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Qingxin Yan","raw_affiliation_strings":["Department of Electronic Engineering, Dalian University of Technology, Gaoxinyuanqu Linggong Road 2, Dalian 116024, China"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, Dalian University of Technology, Gaoxinyuanqu Linggong Road 2, Dalian 116024, China","institution_ids":["https://openalex.org/I27357992"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5087970374","display_name":"Shihua Yu","orcid":null},"institutions":[{"id":"https://openalex.org/I4210135888","display_name":"Hulunbuir University","ror":"https://ror.org/02vx41k98","country_code":"CN","type":"education","lineage":["https://openalex.org/I4210135888"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shihua Yu","raw_affiliation_strings":["School of Computer Science and Technology, Hulunbuir College, Xuefu Road, Hulunbuir 021008, China"],"affiliations":[{"raw_affiliation_string":"School of Computer Science and Technology, Hulunbuir College, Xuefu Road, Hulunbuir 021008, China","institution_ids":["https://openalex.org/I4210135888"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084104675","display_name":"Xianwei Qi","orcid":"https://orcid.org/0000-0001-7333-6072"},"institutions":[{"id":"https://openalex.org/I27357992","display_name":"Dalian University of Technology","ror":"https://ror.org/023hj5876","country_code":"CN","type":"education","lineage":["https://openalex.org/I27357992"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xianwei Qi","raw_affiliation_strings":["Department of Electronic Engineering, Dalian University of Technology, Gaoxinyuanqu Linggong Road 2, Dalian 116024, China"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, Dalian University of Technology, Gaoxinyuanqu Linggong Road 2, Dalian 116024, China","institution_ids":["https://openalex.org/I27357992"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002109075","display_name":"Yudi Zhou","orcid":"https://orcid.org/0000-0002-8125-252X"},"institutions":[{"id":"https://openalex.org/I27357992","display_name":"Dalian University of Technology","ror":"https://ror.org/023hj5876","country_code":"CN","type":"education","lineage":["https://openalex.org/I27357992"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yudi Zhou","raw_affiliation_strings":["Department of Electronic Engineering, Dalian University of Technology, Gaoxinyuanqu Linggong Road 2, Dalian 116024, China"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, Dalian University of Technology, Gaoxinyuanqu Linggong Road 2, Dalian 116024, China","institution_ids":["https://openalex.org/I27357992"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5112012766","display_name":"Zhenan Tang","orcid":null},"institutions":[{"id":"https://openalex.org/I27357992","display_name":"Dalian University of Technology","ror":"https://ror.org/023hj5876","country_code":"CN","type":"education","lineage":["https://openalex.org/I27357992"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Zhenan Tang","raw_affiliation_strings":["Department of Electronic Engineering, Dalian University of Technology, Gaoxinyuanqu Linggong Road 2, Dalian 116024, China"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, Dalian University of Technology, Gaoxinyuanqu Linggong Road 2, Dalian 116024, China","institution_ids":["https://openalex.org/I27357992"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5112012766"],"corresponding_institution_ids":["https://openalex.org/I27357992"],"apc_list":null,"apc_paid":null,"fwci":0.2439,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.59787517,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"2014","issue":null,"first_page":"1","last_page":"9"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11017","display_name":"Chaos-based Image/Signal Encryption","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11017","display_name":"Chaos-based Image/Signal Encryption","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10244","display_name":"Chaos control and synchronization","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/3109","display_name":"Statistical and Nonlinear Physics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12162","display_name":"Cellular Automata and Applications","score":0.9843000173568726,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/nist","display_name":"NIST","score":0.7793828248977661},{"id":"https://openalex.org/keywords/pseudorandom-number-generator","display_name":"Pseudorandom number generator","score":0.7786062359809875},{"id":"https://openalex.org/keywords/chaotic","display_name":"Chaotic","score":0.7767779231071472},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6539332270622253},{"id":"https://openalex.org/keywords/pseudorandom-generator-theorem","display_name":"Pseudorandom generator theorem","score":0.6097604036331177},{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.5908808708190918},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.5817217826843262},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5057878494262695},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.4898171126842499},{"id":"https://openalex.org/keywords/generator","display_name":"Generator (circuit theory)","score":0.4604950249195099},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.24040645360946655},{"id":"https://openalex.org/keywords/pseudorandom-generator","display_name":"Pseudorandom generator","score":0.11499440670013428},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.08825558423995972},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.08412200212478638},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.07563114166259766}],"concepts":[{"id":"https://openalex.org/C111219384","wikidata":"https://www.wikidata.org/wiki/Q6954384","display_name":"NIST","level":2,"score":0.7793828248977661},{"id":"https://openalex.org/C140642157","wikidata":"https://www.wikidata.org/wiki/Q1623338","display_name":"Pseudorandom number generator","level":2,"score":0.7786062359809875},{"id":"https://openalex.org/C2777052490","wikidata":"https://www.wikidata.org/wiki/Q5072826","display_name":"Chaotic","level":2,"score":0.7767779231071472},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6539332270622253},{"id":"https://openalex.org/C180233235","wikidata":"https://www.wikidata.org/wiki/Q7255475","display_name":"Pseudorandom generator theorem","level":4,"score":0.6097604036331177},{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.5908808708190918},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.5817217826843262},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5057878494262695},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4898171126842499},{"id":"https://openalex.org/C2780992000","wikidata":"https://www.wikidata.org/wiki/Q17016113","display_name":"Generator (circuit theory)","level":3,"score":0.4604950249195099},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.24040645360946655},{"id":"https://openalex.org/C92913381","wikidata":"https://www.wikidata.org/wiki/Q7255474","display_name":"Pseudorandom generator","level":3,"score":0.11499440670013428},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.08825558423995972},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.08412200212478638},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.07563114166259766},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C204321447","wikidata":"https://www.wikidata.org/wiki/Q30642","display_name":"Natural language processing","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1155/2014/923618","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2014/923618","pdf_url":null,"source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1155/2014/923618","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2014/923618","pdf_url":null,"source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1517403092","https://openalex.org/W1964850765","https://openalex.org/W1992116882","https://openalex.org/W1993124155","https://openalex.org/W2046011176","https://openalex.org/W2053356947","https://openalex.org/W2065462054","https://openalex.org/W2072930385","https://openalex.org/W2080299237","https://openalex.org/W2103522009","https://openalex.org/W2122271717","https://openalex.org/W2124705459","https://openalex.org/W2128725322","https://openalex.org/W2142587090","https://openalex.org/W2349099207","https://openalex.org/W2362565788","https://openalex.org/W2381803705","https://openalex.org/W2547887102"],"related_works":["https://openalex.org/W2161451071","https://openalex.org/W1972193539","https://openalex.org/W2050598895","https://openalex.org/W44435986","https://openalex.org/W2033896979","https://openalex.org/W1994207320","https://openalex.org/W4241950541","https://openalex.org/W4242117757","https://openalex.org/W2170700734","https://openalex.org/W1516055552"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,94,100],"new":[4],"multioutput":[5],"and":[6,37,80,90,111],"high":[7],"throughput":[8,102],"pseudorandom":[9,71,117],"number":[10,118],"generator.":[11],"The":[12,83],"scheme":[13],"is":[14,85],"to":[15,64],"make":[16],"the":[17,28,38,45,54,59,69,107,115],"homogenized":[18,48],"Logistic":[19,49],"chaotic":[20,35,50,109],"sequence":[21],"as":[22],"unified":[23,29,55],"hyperchaotic":[24,56],"system":[25,84],"parameter.":[26],"So":[27],"hyperchaos":[30],"can":[31,40],"transfer":[32],"in":[33,87],"different":[34],"systems":[36],"output":[39,60,110],"be":[41,62],"more":[42],"complex":[43],"with":[44],"changing":[46],"of":[47,103],"output.":[51],"Through":[52],"processing":[53],"4-way":[57],"outputs,":[58],"will":[61],"extended":[63],"26":[65],"channels.":[66],"In":[67],"addition,":[68],"generated":[70],"sequences":[72],"have":[73],"all":[74],"passed":[75],"NIST":[76],"SP800-22":[77],"standard":[78],"test":[79],"DIEHARD":[81],"test.":[82],"designed":[86],"Verilog":[88],"HDL":[89],"experimentally":[91],"verified":[92],"on":[93],"Xilinx":[95],"Spartan":[96],"6":[97],"FPGA":[98],"for":[99,106,114],"maximum":[101],"16.91":[104],"Gbits/s":[105,113],"native":[108],"13.49":[112],"resulting":[116],"generators.":[119]},"counts_by_year":[{"year":2021,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
