{"id":"https://openalex.org/W1989005145","doi":"https://doi.org/10.1155/2011/178516","title":"Advancement in Nanoscale CMOS Device Design En Route to Ultra-Low-Power Applications","display_name":"Advancement in Nanoscale CMOS Device Design En Route to Ultra-Low-Power Applications","publication_year":2011,"publication_date":"2011-05-26","ids":{"openalex":"https://openalex.org/W1989005145","doi":"https://doi.org/10.1155/2011/178516","mag":"1989005145"},"language":"en","primary_location":{"id":"doi:10.1155/2011/178516","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2011/178516","pdf_url":"https://downloads.hindawi.com/archive/2011/178516.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://downloads.hindawi.com/archive/2011/178516.pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5070640678","display_name":"Subhra Dhar","orcid":"https://orcid.org/0000-0003-4844-5669"},"institutions":[{"id":"https://openalex.org/I9747756","display_name":"Atal Bihari Vajpayee Indian Institute of Information Technology and Management","ror":"https://ror.org/008b3ap06","country_code":"IN","type":"education","lineage":["https://openalex.org/I9747756"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Subhra Dhar","raw_affiliation_strings":["Department of Information Technology, VLSI Design Laboratory, ABV-Indian Institute of Information Technology and Management, Madhya Pradesh, Gwalior 474010, India"],"affiliations":[{"raw_affiliation_string":"Department of Information Technology, VLSI Design Laboratory, ABV-Indian Institute of Information Technology and Management, Madhya Pradesh, Gwalior 474010, India","institution_ids":["https://openalex.org/I9747756"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038140573","display_name":"Manisha Pattanaik","orcid":"https://orcid.org/0000-0001-7842-0695"},"institutions":[{"id":"https://openalex.org/I9747756","display_name":"Atal Bihari Vajpayee Indian Institute of Information Technology and Management","ror":"https://ror.org/008b3ap06","country_code":"IN","type":"education","lineage":["https://openalex.org/I9747756"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Manisha Pattanaik","raw_affiliation_strings":["Department of Information Technology, VLSI Design Laboratory, ABV-Indian Institute of Information Technology and Management, Madhya Pradesh, Gwalior 474010, India"],"affiliations":[{"raw_affiliation_string":"Department of Information Technology, VLSI Design Laboratory, ABV-Indian Institute of Information Technology and Management, Madhya Pradesh, Gwalior 474010, India","institution_ids":["https://openalex.org/I9747756"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5069511128","display_name":"Rajaram Poolla","orcid":"https://orcid.org/0000-0002-1791-8534"},"institutions":[{"id":"https://openalex.org/I102471911","display_name":"Jiwaji University","ror":"https://ror.org/00w9a2z18","country_code":"IN","type":"education","lineage":["https://openalex.org/I102471911"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Poolla Rajaram","raw_affiliation_strings":["School of Studies in Physics, Jiwaji University, Madhya Pradesh, Gwalior 474011, India"],"affiliations":[{"raw_affiliation_string":"School of Studies in Physics, Jiwaji University, Madhya Pradesh, Gwalior 474011, India","institution_ids":["https://openalex.org/I102471911"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5070640678"],"corresponding_institution_ids":["https://openalex.org/I9747756"],"apc_list":null,"apc_paid":null,"fwci":1.5898,"has_fulltext":true,"cited_by_count":26,"citation_normalized_percentile":{"value":0.84124604,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"2011","issue":null,"first_page":"1","last_page":"19"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.8500544428825378},{"id":"https://openalex.org/keywords/subthreshold-conduction","display_name":"Subthreshold conduction","score":0.5674889087677002},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.5313993692398071},{"id":"https://openalex.org/keywords/low-voltage","display_name":"Low voltage","score":0.514020562171936},{"id":"https://openalex.org/keywords/technology-roadmap","display_name":"Technology roadmap","score":0.4939027428627014},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.47665172815322876},{"id":"https://openalex.org/keywords/ultra-low-power","display_name":"Ultra low power","score":0.46954545378685},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4441480040550232},{"id":"https://openalex.org/keywords/low-power-electronics","display_name":"Low-power electronics","score":0.43374770879745483},{"id":"https://openalex.org/keywords/scaling","display_name":"Scaling","score":0.43108078837394714},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4239698648452759},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4185383915901184},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3920358419418335},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.36033913493156433},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3217109441757202},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.30847299098968506}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.8500544428825378},{"id":"https://openalex.org/C156465305","wikidata":"https://www.wikidata.org/wiki/Q1658601","display_name":"Subthreshold conduction","level":4,"score":0.5674889087677002},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.5313993692398071},{"id":"https://openalex.org/C128624480","wikidata":"https://www.wikidata.org/wiki/Q1504817","display_name":"Low voltage","level":3,"score":0.514020562171936},{"id":"https://openalex.org/C2780156850","wikidata":"https://www.wikidata.org/wiki/Q2144097","display_name":"Technology roadmap","level":2,"score":0.4939027428627014},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.47665172815322876},{"id":"https://openalex.org/C3017773396","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Ultra low power","level":4,"score":0.46954545378685},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4441480040550232},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.43374770879745483},{"id":"https://openalex.org/C99844830","wikidata":"https://www.wikidata.org/wiki/Q102441924","display_name":"Scaling","level":2,"score":0.43108078837394714},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4239698648452759},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4185383915901184},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3920358419418335},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.36033913493156433},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3217109441757202},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.30847299098968506},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C144133560","wikidata":"https://www.wikidata.org/wiki/Q4830453","display_name":"Business","level":0,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C162853370","wikidata":"https://www.wikidata.org/wiki/Q39809","display_name":"Marketing","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1155/2011/178516","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2011/178516","pdf_url":"https://downloads.hindawi.com/archive/2011/178516.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1155/2011/178516","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2011/178516","pdf_url":"https://downloads.hindawi.com/archive/2011/178516.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"sustainable_development_goals":[{"score":0.8100000023841858,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W1989005145.pdf","grobid_xml":"https://content.openalex.org/works/W1989005145.grobid-xml"},"referenced_works_count":33,"referenced_works":["https://openalex.org/W1500452363","https://openalex.org/W1539634823","https://openalex.org/W1661368752","https://openalex.org/W1989714673","https://openalex.org/W2004388506","https://openalex.org/W2018937740","https://openalex.org/W2023787552","https://openalex.org/W2090398071","https://openalex.org/W2107814488","https://openalex.org/W2110201904","https://openalex.org/W2111269147","https://openalex.org/W2116654180","https://openalex.org/W2121201099","https://openalex.org/W2121996242","https://openalex.org/W2126810113","https://openalex.org/W2129064750","https://openalex.org/W2129439881","https://openalex.org/W2130953587","https://openalex.org/W2131862714","https://openalex.org/W2142529692","https://openalex.org/W2145765216","https://openalex.org/W2146131591","https://openalex.org/W2155289070","https://openalex.org/W2156767863","https://openalex.org/W2158824602","https://openalex.org/W2160401101","https://openalex.org/W2160739341","https://openalex.org/W2163231535","https://openalex.org/W2164336183","https://openalex.org/W2167903456","https://openalex.org/W2171105988","https://openalex.org/W2534732202","https://openalex.org/W2536759112"],"related_works":["https://openalex.org/W2524786631","https://openalex.org/W2468619362","https://openalex.org/W3148554323","https://openalex.org/W1619389265","https://openalex.org/W2155579514","https://openalex.org/W2159448561","https://openalex.org/W2610960993","https://openalex.org/W2738635230","https://openalex.org/W2136758643","https://openalex.org/W2915016853"],"abstract_inverted_index":{"In":[0],"recent":[1],"years,":[2],"the":[3,14,22,38,70,88,97,111,130],"demand":[4],"for":[5,68,84,115,125],"power":[6],"sensitive":[7],"designs":[8],"has":[9,30],"grown":[10],"significantly":[11],"due":[12,36],"to":[13,37,109],"fast":[15],"growth":[16],"of":[17,34,47,136],"battery-operated":[18],"portable":[19],"applications.":[20,45],"As":[21],"technology":[23,91],"scaling":[24,69],"continues":[25],"unabated,":[26],"subthreshold":[27],"device":[28,126],"design":[29],"gained":[31],"a":[32,59,65,123],"lot":[33],"attention":[35],"low-power":[39,48,116],"and":[40,51,56,74,81,113,117,120,132],"ultra-low-power":[41],"consumption":[42],"in":[43,96,103,129],"various":[44,94],"Design":[46],"high-performance":[49],"submicron":[50,53,131,134],"deep":[52,133],"CMOS":[54,86,137],"devices":[55,138],"circuits":[57],"is":[58,64],"big":[60],"challenge.":[61],"Short-channel":[62],"effect":[63],"major":[66],"challenge":[67],"gate":[71],"length":[72],"down":[73],"below":[75],"0.1":[76],"\u03bc":[77],"m.":[78],"Detailed":[79],"review":[80],"potential":[82],"solutions":[83,114],"prolonging":[85],"as":[87],"leading":[89],"information":[90],"proposed":[92],"by":[93],"researchers":[95],"past":[98],"two":[99],"decades":[100],"are":[101],"presented":[102],"this":[104],"paper.":[105],"This":[106],"paper":[107],"attempts":[108],"categorize":[110],"challenges":[112],"low-voltage":[118],"application":[119],"thus":[121],"provides":[122],"roadmap":[124],"designers":[127],"working":[128],"region":[135],"separately.":[139]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":3},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":4},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
