{"id":"https://openalex.org/W2116664661","doi":"https://doi.org/10.1155/2010/652620","title":"Traversal Caches: A Framework for FPGA Acceleration of Pointer Data Structures","display_name":"Traversal Caches: A Framework for FPGA Acceleration of Pointer Data Structures","publication_year":2010,"publication_date":"2010-01-01","ids":{"openalex":"https://openalex.org/W2116664661","doi":"https://doi.org/10.1155/2010/652620","mag":"2116664661"},"language":"en","primary_location":{"id":"doi:10.1155/2010/652620","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2010/652620","pdf_url":"https://downloads.hindawi.com/journals/ijrc/2010/652620.pdf","source":{"id":"https://openalex.org/S194867674","display_name":"International Journal of Reconfigurable Computing","issn_l":"1687-7195","issn":["1687-7195","1687-7209"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Journal of Reconfigurable Computing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://downloads.hindawi.com/journals/ijrc/2010/652620.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5027192362","display_name":"James Coole","orcid":null},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"James Coole","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL 32611-6550, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL 32611-6550, USA","institution_ids":["https://openalex.org/I33213144"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5088031457","display_name":"Greg Stitt","orcid":"https://orcid.org/0000-0001-7159-7439"},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Greg Stitt","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL 32611-6550, USA"],"raw_orcid":"https://orcid.org/0000-0001-7159-7439","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL 32611-6550, USA","institution_ids":["https://openalex.org/I33213144"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5088031457"],"corresponding_institution_ids":["https://openalex.org/I33213144"],"apc_list":{"value":900,"currency":"USD","value_usd":900},"apc_paid":{"value":900,"currency":"USD","value_usd":900},"fwci":0.2529,"has_fulltext":true,"cited_by_count":4,"citation_normalized_percentile":{"value":0.59285781,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"2010","issue":null,"first_page":"1","last_page":"16"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8318337202072144},{"id":"https://openalex.org/keywords/pointer","display_name":"Pointer (user interface)","score":0.7921460866928101},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.7874704599380493},{"id":"https://openalex.org/keywords/tree-traversal","display_name":"Tree traversal","score":0.6883519887924194},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6266655921936035},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5495494604110718},{"id":"https://openalex.org/keywords/memory-bandwidth","display_name":"Memory bandwidth","score":0.5327662825584412},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.45882558822631836},{"id":"https://openalex.org/keywords/data-structure","display_name":"Data structure","score":0.4309615194797516},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4013965427875519},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3529323637485504},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.25878965854644775},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1795523464679718},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.12281498312950134}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8318337202072144},{"id":"https://openalex.org/C150202949","wikidata":"https://www.wikidata.org/wiki/Q107602","display_name":"Pointer (user interface)","level":2,"score":0.7921460866928101},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.7874704599380493},{"id":"https://openalex.org/C140745168","wikidata":"https://www.wikidata.org/wiki/Q1210082","display_name":"Tree traversal","level":2,"score":0.6883519887924194},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6266655921936035},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5495494604110718},{"id":"https://openalex.org/C188045654","wikidata":"https://www.wikidata.org/wiki/Q17148339","display_name":"Memory bandwidth","level":2,"score":0.5327662825584412},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.45882558822631836},{"id":"https://openalex.org/C162319229","wikidata":"https://www.wikidata.org/wiki/Q175263","display_name":"Data structure","level":2,"score":0.4309615194797516},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4013965427875519},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3529323637485504},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.25878965854644775},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1795523464679718},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.12281498312950134}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1155/2010/652620","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2010/652620","pdf_url":"https://downloads.hindawi.com/journals/ijrc/2010/652620.pdf","source":{"id":"https://openalex.org/S194867674","display_name":"International Journal of Reconfigurable Computing","issn_l":"1687-7195","issn":["1687-7195","1687-7209"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Journal of Reconfigurable Computing","raw_type":"journal-article"},{"id":"pmh:oai:doaj.org/article:1660972765d643b4ae0c8ecbc1a776e6","is_oa":true,"landing_page_url":"https://doaj.org/article/1660972765d643b4ae0c8ecbc1a776e6","pdf_url":null,"source":{"id":"https://openalex.org/S4306401280","display_name":"DOAJ (DOAJ: Directory of Open Access Journals)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-sa","license_id":"https://openalex.org/licenses/cc-by-sa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"International Journal of Reconfigurable Computing, Vol 2010 (2010)","raw_type":"article"}],"best_oa_location":{"id":"doi:10.1155/2010/652620","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2010/652620","pdf_url":"https://downloads.hindawi.com/journals/ijrc/2010/652620.pdf","source":{"id":"https://openalex.org/S194867674","display_name":"International Journal of Reconfigurable Computing","issn_l":"1687-7195","issn":["1687-7195","1687-7209"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Journal of Reconfigurable Computing","raw_type":"journal-article"},"sustainable_development_goals":[{"score":0.5699999928474426,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2116664661.pdf","grobid_xml":"https://content.openalex.org/works/W2116664661.grobid-xml"},"referenced_works_count":23,"referenced_works":["https://openalex.org/W1987981153","https://openalex.org/W1994115836","https://openalex.org/W2005689402","https://openalex.org/W2012687750","https://openalex.org/W2016192089","https://openalex.org/W2028285139","https://openalex.org/W2028437460","https://openalex.org/W2030922743","https://openalex.org/W2030934436","https://openalex.org/W2051498260","https://openalex.org/W2102885578","https://openalex.org/W2105332698","https://openalex.org/W2105824580","https://openalex.org/W2121850586","https://openalex.org/W2123565576","https://openalex.org/W2128060503","https://openalex.org/W2138395840","https://openalex.org/W2141276023","https://openalex.org/W2141499623","https://openalex.org/W2153691881","https://openalex.org/W2161761794","https://openalex.org/W2163045483","https://openalex.org/W2169736898"],"related_works":["https://openalex.org/W121845590","https://openalex.org/W1501906007","https://openalex.org/W2156771668","https://openalex.org/W2084590597","https://openalex.org/W1874815355","https://openalex.org/W4229844547","https://openalex.org/W4243828764","https://openalex.org/W4254523142","https://openalex.org/W2391392917","https://openalex.org/W4376647684"],"abstract_inverted_index":{"Field-programmable":[0],"gate":[1],"arrays":[2],"(FPGAs)":[3],"and":[4,23,113,143,160],"other":[5],"reconfigurable":[6],"computing":[7],"(RC)":[8],"devices":[9],"have":[10,15],"been":[11,37],"widely":[12],"shown":[13],"to":[14,27,39,87,91,139],"numerous":[16],"advantages":[17],"including":[18],"order":[19],"of":[20,49],"magnitude":[21],"performance":[22],"power":[24],"improvements":[25],"compared":[26],"microprocessors":[28],"for":[29,67,166],"some":[30],"applications.":[31],"Unfortunately,":[32],"FPGA":[33],"usage":[34],"has":[35],"largely":[36],"limited":[38],"applications":[40,51,102,120,131],"exhibiting":[41],"sequential":[42],"memory":[43,141],"access":[44],"patterns,":[45],"thereby":[46],"prohibiting":[47],"acceleration":[48],"important":[50],"with":[52,103,132],"irregular":[53,73],"patterns":[54],"(e.g.,":[55],"pointer-based":[56,117],"data":[57,74,86],"structures).":[58],"In":[59],"this":[60],"paper,":[61],"we":[62,107,125],"present":[63,126],"a":[64,79,97,156,163],"design":[65],"pattern":[66],"RC":[68],"application":[69],"development":[70],"that":[71,100,129,151],"serializes":[72],"structure":[75],"traversals":[76,135,146],"online":[77],"into":[78],"traversal":[80],"cache,":[81],"which":[82,106],"allows":[83],"the":[84,92],"corresponding":[85],"be":[88],"efficiently":[89],"streamed":[90],"FPGA.":[93],"The":[94],"paper":[95],"presents":[96],"generalized":[98],"framework":[99],"benefits":[101],"repeated":[104,123],"traversals,":[105,124],"show":[108,150],"can":[109,154],"achieve":[110,155],"between":[111,158],"7x":[112],"29x":[114],"speedup":[115,157],"over":[116],"software.":[118],"For":[119],"without":[121],"strictly":[122],"application-specialized":[127],"extensions":[128,153],"benefit":[130],"highly":[133],"similar":[134],"by":[136],"exploiting":[137],"similarity":[138],"improve":[140],"bandwidth":[142],"execute":[144],"multiple":[145],"in":[147],"parallel.":[148],"We":[149],"these":[152],"11x":[159],"70x":[161],"on":[162],"Virtex4":[164],"LX100":[165],"Barnes-Hut":[167],"n-body":[168],"simulation.":[169]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}
