{"id":"https://openalex.org/W2069927816","doi":"https://doi.org/10.1155/2009/703267","title":"Architectural Synthesis of Fixed\u2010Point DSP Datapaths Using FPGAs","display_name":"Architectural Synthesis of Fixed\u2010Point DSP Datapaths Using FPGAs","publication_year":2009,"publication_date":"2009-01-01","ids":{"openalex":"https://openalex.org/W2069927816","doi":"https://doi.org/10.1155/2009/703267","mag":"2069927816"},"language":"en","primary_location":{"id":"doi:10.1155/2009/703267","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2009/703267","pdf_url":"https://downloads.hindawi.com/journals/ijrc/2009/703267.pdf","source":{"id":"https://openalex.org/S194867674","display_name":"International Journal of Reconfigurable Computing","issn_l":"1687-7195","issn":["1687-7195","1687-7209"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Journal of Reconfigurable Computing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://downloads.hindawi.com/journals/ijrc/2009/703267.pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5063380020","display_name":"Gabriel Caffarena","orcid":"https://orcid.org/0000-0002-2902-3869"},"institutions":[{"id":"https://openalex.org/I88060688","display_name":"Universidad Polit\u00e9cnica de Madrid","ror":"https://ror.org/03n6nwv02","country_code":"ES","type":"education","lineage":["https://openalex.org/I88060688"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"Gabriel Caffarena","raw_affiliation_strings":["Departamento de Ingenier\u00eda Electr\u00f3nica, Universidad Polit\u00e9cnica de Madrid, Ciudad Universitaria s/n, 28040 Madrid, Spain","Departamento de Ingenier\u00eda Electr\u00f3nica, Universidad Polit\u00e9cnica de Madrid, Madrid, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Departamento de Ingenier\u00eda Electr\u00f3nica, Universidad Polit\u00e9cnica de Madrid, Ciudad Universitaria s/n, 28040 Madrid, Spain","institution_ids":["https://openalex.org/I88060688"]},{"raw_affiliation_string":"Departamento de Ingenier\u00eda Electr\u00f3nica, Universidad Polit\u00e9cnica de Madrid, Madrid, Spain","institution_ids":["https://openalex.org/I88060688"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054052733","display_name":"Juan Antonio L\u00f3pez Mart\u00edn","orcid":"https://orcid.org/0000-0002-5808-5014"},"institutions":[{"id":"https://openalex.org/I88060688","display_name":"Universidad Polit\u00e9cnica de Madrid","ror":"https://ror.org/03n6nwv02","country_code":"ES","type":"education","lineage":["https://openalex.org/I88060688"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Juan A. L\u00f3pez","raw_affiliation_strings":["Departamento de Ingenier\u00eda Electr\u00f3nica, Universidad Polit\u00e9cnica de Madrid, Ciudad Universitaria s/n, 28040 Madrid, Spain","Departamento de Ingenier\u00eda Electr\u00f3nica, Universidad Polit\u00e9cnica de Madrid, Madrid, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Departamento de Ingenier\u00eda Electr\u00f3nica, Universidad Polit\u00e9cnica de Madrid, Ciudad Universitaria s/n, 28040 Madrid, Spain","institution_ids":["https://openalex.org/I88060688"]},{"raw_affiliation_string":"Departamento de Ingenier\u00eda Electr\u00f3nica, Universidad Polit\u00e9cnica de Madrid, Madrid, Spain","institution_ids":["https://openalex.org/I88060688"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041224036","display_name":"Gerardo Leyva\u2010G\u00f3mez","orcid":"https://orcid.org/0000-0002-7940-1100"},"institutions":[{"id":"https://openalex.org/I190103667","display_name":"Autonomous University of Aguascalientes","ror":"https://ror.org/03ec8vy26","country_code":"MX","type":"education","lineage":["https://openalex.org/I190103667"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"Gerardo Leyva","raw_affiliation_strings":["Departamento de Sistemas Electr\u00f3nicos, Universidad Aut\u00f3noma de Aguascalientes, Ciudad Universitaria s/n, 20100 Aguascalientes, Mexico","Departamento de Sistemas Electr\u00f3nicos, Universidad Aut\u00f3noma de Aguascalientes, Aguascalientes, Mexico#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Departamento de Sistemas Electr\u00f3nicos, Universidad Aut\u00f3noma de Aguascalientes, Ciudad Universitaria s/n, 20100 Aguascalientes, Mexico","institution_ids":["https://openalex.org/I190103667"]},{"raw_affiliation_string":"Departamento de Sistemas Electr\u00f3nicos, Universidad Aut\u00f3noma de Aguascalientes, Aguascalientes, Mexico#TAB#","institution_ids":["https://openalex.org/I190103667"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078746692","display_name":"Carlos Carreras","orcid":"https://orcid.org/0000-0002-1594-5635"},"institutions":[{"id":"https://openalex.org/I88060688","display_name":"Universidad Polit\u00e9cnica de Madrid","ror":"https://ror.org/03n6nwv02","country_code":"ES","type":"education","lineage":["https://openalex.org/I88060688"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Carlos Carreras","raw_affiliation_strings":["Departamento de Ingenier\u00eda Electr\u00f3nica, Universidad Polit\u00e9cnica de Madrid, Ciudad Universitaria s/n, 28040 Madrid, Spain","Departamento de Ingenier\u00eda Electr\u00f3nica, Universidad Polit\u00e9cnica de Madrid, Madrid, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Departamento de Ingenier\u00eda Electr\u00f3nica, Universidad Polit\u00e9cnica de Madrid, Ciudad Universitaria s/n, 28040 Madrid, Spain","institution_ids":["https://openalex.org/I88060688"]},{"raw_affiliation_string":"Departamento de Ingenier\u00eda Electr\u00f3nica, Universidad Polit\u00e9cnica de Madrid, Madrid, Spain","institution_ids":["https://openalex.org/I88060688"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5020848263","display_name":"Octavio Nieto-Taladriz","orcid":"https://orcid.org/0000-0003-1411-6947"},"institutions":[{"id":"https://openalex.org/I88060688","display_name":"Universidad Polit\u00e9cnica de Madrid","ror":"https://ror.org/03n6nwv02","country_code":"ES","type":"education","lineage":["https://openalex.org/I88060688"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Octavio Nieto-Taladriz","raw_affiliation_strings":["Departamento de Ingenier\u00eda Electr\u00f3nica, Universidad Polit\u00e9cnica de Madrid, Ciudad Universitaria s/n, 28040 Madrid, Spain","Departamento de Ingenier\u00eda Electr\u00f3nica, Universidad Polit\u00e9cnica de Madrid, Madrid, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Departamento de Ingenier\u00eda Electr\u00f3nica, Universidad Polit\u00e9cnica de Madrid, Ciudad Universitaria s/n, 28040 Madrid, Spain","institution_ids":["https://openalex.org/I88060688"]},{"raw_affiliation_string":"Departamento de Ingenier\u00eda Electr\u00f3nica, Universidad Polit\u00e9cnica de Madrid, Madrid, Spain","institution_ids":["https://openalex.org/I88060688"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5063380020"],"corresponding_institution_ids":["https://openalex.org/I88060688"],"apc_list":{"value":925,"currency":"USD","value_usd":925},"apc_paid":{"value":925,"currency":"USD","value_usd":925},"fwci":2.5683,"has_fulltext":true,"cited_by_count":15,"citation_normalized_percentile":{"value":0.89273749,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"2009","issue":"1","first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/datapath","display_name":"Datapath","score":0.9630435705184937},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8323076963424683},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7701659202575684},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.6815705299377441},{"id":"https://openalex.org/keywords/multiplexer","display_name":"Multiplexer","score":0.594005823135376},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5410380363464355},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.4557265341281891},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.4339934289455414},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3896329402923584},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.36439403891563416},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3236929774284363},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.27388495206832886}],"concepts":[{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.9630435705184937},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8323076963424683},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7701659202575684},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.6815705299377441},{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.594005823135376},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5410380363464355},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.4557265341281891},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.4339934289455414},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3896329402923584},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.36439403891563416},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3236929774284363},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.27388495206832886},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1155/2009/703267","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2009/703267","pdf_url":"https://downloads.hindawi.com/journals/ijrc/2009/703267.pdf","source":{"id":"https://openalex.org/S194867674","display_name":"International Journal of Reconfigurable Computing","issn_l":"1687-7195","issn":["1687-7195","1687-7209"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Journal of Reconfigurable Computing","raw_type":"journal-article"},{"id":"pmh:oai:doaj.org/article:a2d9e2c9ef1f4783874d8c0877c59280","is_oa":false,"landing_page_url":"https://doaj.org/article/a2d9e2c9ef1f4783874d8c0877c59280","pdf_url":null,"source":{"id":"https://openalex.org/S4306401280","display_name":"DOAJ (DOAJ: Directory of Open Access Journals)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"International Journal of Reconfigurable Computing, Vol 2009 (2009)","raw_type":"article"}],"best_oa_location":{"id":"doi:10.1155/2009/703267","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2009/703267","pdf_url":"https://downloads.hindawi.com/journals/ijrc/2009/703267.pdf","source":{"id":"https://openalex.org/S194867674","display_name":"International Journal of Reconfigurable Computing","issn_l":"1687-7195","issn":["1687-7195","1687-7209"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Journal of Reconfigurable Computing","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2069927816.pdf","grobid_xml":"https://content.openalex.org/works/W2069927816.grobid-xml"},"referenced_works_count":33,"referenced_works":["https://openalex.org/W8516072","https://openalex.org/W127534415","https://openalex.org/W1501488688","https://openalex.org/W1827246489","https://openalex.org/W1898422521","https://openalex.org/W1912583520","https://openalex.org/W1967066822","https://openalex.org/W1972513740","https://openalex.org/W1974956884","https://openalex.org/W1986740709","https://openalex.org/W1988527831","https://openalex.org/W2002760267","https://openalex.org/W2024060531","https://openalex.org/W2029320569","https://openalex.org/W2094917740","https://openalex.org/W2096059450","https://openalex.org/W2109573698","https://openalex.org/W2111620753","https://openalex.org/W2114157355","https://openalex.org/W2124964399","https://openalex.org/W2128054489","https://openalex.org/W2131770711","https://openalex.org/W2139900512","https://openalex.org/W2149436322","https://openalex.org/W2151820033","https://openalex.org/W2152709832","https://openalex.org/W2155213432","https://openalex.org/W2172151141","https://openalex.org/W2532951496","https://openalex.org/W2538531037","https://openalex.org/W4237025662","https://openalex.org/W4242391517","https://openalex.org/W4250246833"],"related_works":["https://openalex.org/W2136810374","https://openalex.org/W1604320855","https://openalex.org/W2014858890","https://openalex.org/W2069927816","https://openalex.org/W1603238397","https://openalex.org/W2066370207","https://openalex.org/W2057648092","https://openalex.org/W4281757109","https://openalex.org/W2168738857","https://openalex.org/W1531732909"],"abstract_inverted_index":{"We":[0],"address":[1],"the":[2,60,69,76,100,115],"automatic":[3],"synthesis":[4],"of":[5,17,29,49,62,71,78,82,88,103],"DSP":[6,54],"algorithms":[7],"using":[8],"FPGAs.":[9],"Optimized":[10],"fixed\u2010point":[11,72,91],"implementations":[12],"are":[13],"obtained":[14],"by":[15],"means":[16],"considering":[18],"(i)":[19,59],"a":[20,25,64,79,89],"multiple":[21,65],"wordlength":[22,66],"approach;":[23],"(ii)":[24,75],"complete":[26,90],"datapath":[27,92],"formed":[28],"wordlength\u2010wise":[30],"resources":[31,107],"(i.e.,":[32],"functional":[33],"units,":[34],"multiplexers,":[35],"and":[36,52,74,110],"registers);":[37],"(iii)":[38],"an":[39,46],"FPGA\u2010wise":[40],"resource":[41,117],"usage":[42,118],"metric":[43],"that":[44],"enables":[45],"efficient":[47],"distribution":[48],"logic":[50],"fabric":[51,109],"embedded":[53,83,111],"resources.":[55,85],"The":[56,86],"paper":[57],"shows":[58],"benefits":[61,77],"applying":[63],"approach":[67],"to":[68,94,97,105,114,121,124],"implementation":[70],"datapaths":[73],"wise":[80,101],"use":[81,87],"FPGA":[84,106],"leads":[93,120],"improvements":[95,122],"up":[96,123],"35%.":[98],"And,":[99],"mapping":[102],"operations":[104],"(logic":[108],"blocks),":[112],"thanks":[113],"proposed":[116],"metric,":[119],"54%.":[125]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":3}],"updated_date":"2026-07-29T09:40:50.615796","created_date":"2025-10-10T00:00:00"}