{"id":"https://openalex.org/W2094558972","doi":"https://doi.org/10.1155/2009/415646","title":"Low-Cost Allocator Implementations for Networks-on-Chip Routers","display_name":"Low-Cost Allocator Implementations for Networks-on-Chip Routers","publication_year":2009,"publication_date":"2009-03-15","ids":{"openalex":"https://openalex.org/W2094558972","doi":"https://doi.org/10.1155/2009/415646","mag":"2094558972"},"language":"en","primary_location":{"id":"doi:10.1155/2009/415646","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2009/415646","pdf_url":"https://downloads.hindawi.com/archive/2009/415646.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://downloads.hindawi.com/archive/2009/415646.pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100402948","display_name":"Min Zhang","orcid":"https://orcid.org/0000-0002-7955-1467"},"institutions":[{"id":"https://openalex.org/I177725633","display_name":"Chinese University of Hong Kong","ror":"https://ror.org/00t33hh48","country_code":"CN","type":"education","lineage":["https://openalex.org/I177725633"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Min Zhang","raw_affiliation_strings":["Department of Electronic Engineering, The Chinese University of Hong Kong, Shatin, Hong Kong"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, The Chinese University of Hong Kong, Shatin, Hong Kong","institution_ids":["https://openalex.org/I177725633"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5020902784","display_name":"Chiu\u2010Sing Choy","orcid":"https://orcid.org/0000-0002-8370-3144"},"institutions":[{"id":"https://openalex.org/I177725633","display_name":"Chinese University of Hong Kong","ror":"https://ror.org/00t33hh48","country_code":"CN","type":"education","lineage":["https://openalex.org/I177725633"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Chiu-Sing Choy","raw_affiliation_strings":["Department of Electronic Engineering, The Chinese University of Hong Kong, Shatin, Hong Kong"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, The Chinese University of Hong Kong, Shatin, Hong Kong","institution_ids":["https://openalex.org/I177725633"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5100402948"],"corresponding_institution_ids":["https://openalex.org/I177725633"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":4,"citation_normalized_percentile":{"value":0.14413351,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":"2009","issue":null,"first_page":"1","last_page":"10"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10018","display_name":"Advancements in Battery Materials","score":0.9932000041007996,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9926000237464905,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/allocator","display_name":"Allocator","score":0.9577082991600037},{"id":"https://openalex.org/keywords/router","display_name":"Router","score":0.8144524693489075},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7024490833282471},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.6745434999465942},{"id":"https://openalex.org/keywords/deadlock","display_name":"Deadlock","score":0.5643590092658997},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.5435755848884583},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5088122487068176},{"id":"https://openalex.org/keywords/systemc","display_name":"SystemC","score":0.4986226558685303},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4313940107822418},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.41311943531036377},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4120079278945923},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.40645745396614075},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.2716389298439026},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07540106773376465}],"concepts":[{"id":"https://openalex.org/C162262903","wikidata":"https://www.wikidata.org/wiki/Q343527","display_name":"Allocator","level":2,"score":0.9577082991600037},{"id":"https://openalex.org/C2775896111","wikidata":"https://www.wikidata.org/wiki/Q642560","display_name":"Router","level":2,"score":0.8144524693489075},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7024490833282471},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.6745434999465942},{"id":"https://openalex.org/C159023740","wikidata":"https://www.wikidata.org/wiki/Q623276","display_name":"Deadlock","level":2,"score":0.5643590092658997},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.5435755848884583},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5088122487068176},{"id":"https://openalex.org/C2776928060","wikidata":"https://www.wikidata.org/wiki/Q1753563","display_name":"SystemC","level":2,"score":0.4986226558685303},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4313940107822418},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.41311943531036377},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4120079278945923},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.40645745396614075},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.2716389298439026},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07540106773376465},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1155/2009/415646","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2009/415646","pdf_url":"https://downloads.hindawi.com/archive/2009/415646.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1155/2009/415646","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2009/415646","pdf_url":"https://downloads.hindawi.com/archive/2009/415646.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.4399999976158142}],"awards":[{"id":"https://openalex.org/G4903218271","display_name":null,"funder_award_id":"2050429","funder_id":"https://openalex.org/F4320322942","funder_display_name":"Chinese University of Hong Kong"}],"funders":[{"id":"https://openalex.org/F4320322942","display_name":"Chinese University of Hong Kong","ror":"https://ror.org/00t33hh48"}],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2094558972.pdf","grobid_xml":"https://content.openalex.org/works/W2094558972.grobid-xml"},"referenced_works_count":14,"referenced_works":["https://openalex.org/W1501077214","https://openalex.org/W2038892414","https://openalex.org/W2097560795","https://openalex.org/W2099399959","https://openalex.org/W2109681980","https://openalex.org/W2118961575","https://openalex.org/W2126701595","https://openalex.org/W2134049183","https://openalex.org/W2139126128","https://openalex.org/W2155131052","https://openalex.org/W2155597158","https://openalex.org/W2167916917","https://openalex.org/W2462193902","https://openalex.org/W4234308027"],"related_works":["https://openalex.org/W2754086592","https://openalex.org/W3198758847","https://openalex.org/W4230458348","https://openalex.org/W4297990507","https://openalex.org/W1978510333","https://openalex.org/W2541426356","https://openalex.org/W2063558432","https://openalex.org/W2094558972","https://openalex.org/W2411424570","https://openalex.org/W2132408107"],"abstract_inverted_index":{"Cost-effective":[0],"Networks-on-Chip":[1],"(NoCs)":[2],"routers":[3],"are":[4,65,110,143],"important":[5],"for":[6,71],"future":[7],"SoCs":[8],"and":[9,22,36,52,75,100,107,117,127,133],"embedded":[10],"devices.":[11],"Implementation":[12],"results":[13],"show":[14,122],"that":[15,123],"the":[16,23,46,53,62,68,83,86,90,97,108,125,128,137],"generic":[17,24,63,98,138],"virtual":[18,76],"channel":[19,77],"allocator":[20,26,78],"(VA)":[21],"switch":[25,74],"(SA)":[27],"of":[28,34,45,49,56,85],"a":[29,42,50,72,113],"router":[30,91],"consume":[31],"large":[32],"amount":[33],"area":[35,132],"power.":[37],"In":[38],"this":[39],"paper,":[40],"after":[41],"careful":[43],"study":[44],"working":[47],"principle":[48],"VA":[51,64,87],"utilization":[54],"statistics":[55],"its":[57],"arbiters,":[58],"opportunities":[59],"to":[60,136],"simplify":[61],"identified.":[66],"Then,":[67],"deadlock":[69],"problem":[70],"combined":[73],"(SVA)":[79],"is":[80,94],"studied.":[81],"Next,":[82],"impact":[84],"simplification":[88],"on":[89],"critical":[92],"paths":[93],"analyzed.":[95],"Finally,":[96],"architecture":[99],"two":[101],"low-cost":[102],"architectures":[103],"proposed":[104],"(the":[105],"look-ahead,":[106],"SVA)":[109],"evaluated":[111],"with":[112],"cycle-accurate":[114],"network":[115],"simulator":[116],"detailed":[118],"VLSI":[119],"implementations.":[120],"Results":[121],"both":[124],"look-ahead":[126],"SVA":[129],"significantly":[130],"reduce":[131],"power":[134],"compared":[135],"architecture.":[139],"Furthermore,":[140],"cost":[141],"savings":[142],"achieved":[144],"without":[145],"performance":[146],"penalty.":[147]},"counts_by_year":[{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
