{"id":"https://openalex.org/W1997936925","doi":"https://doi.org/10.1155/2008/751863","title":"On the Power Dissipation of Embedded Memory Blocks Used to Implement Logic in Field-Programmable Gate Arrays","display_name":"On the Power Dissipation of Embedded Memory Blocks Used to Implement Logic in Field-Programmable Gate Arrays","publication_year":2008,"publication_date":"2008-01-01","ids":{"openalex":"https://openalex.org/W1997936925","doi":"https://doi.org/10.1155/2008/751863","mag":"1997936925"},"language":"en","primary_location":{"id":"doi:10.1155/2008/751863","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2008/751863","pdf_url":"https://downloads.hindawi.com/journals/ijrc/2008/751863.pdf","source":{"id":"https://openalex.org/S194867674","display_name":"International Journal of Reconfigurable Computing","issn_l":"1687-7195","issn":["1687-7195","1687-7209"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Journal of Reconfigurable Computing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://downloads.hindawi.com/journals/ijrc/2008/751863.pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5042976080","display_name":"Scott Y. L. Chin","orcid":null},"institutions":[{"id":"https://openalex.org/I141945490","display_name":"University of British Columbia","ror":"https://ror.org/03rmrcq20","country_code":"CA","type":"education","lineage":["https://openalex.org/I141945490"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Scott Y. L. Chin","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Faculty of Applied Sciences, University of British Columbia, Vancouver, B.C., Canada V6T 1Z4"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Faculty of Applied Sciences, University of British Columbia, Vancouver, B.C., Canada V6T 1Z4","institution_ids":["https://openalex.org/I141945490"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028718000","display_name":"Clarence S. P. Lee","orcid":null},"institutions":[{"id":"https://openalex.org/I141945490","display_name":"University of British Columbia","ror":"https://ror.org/03rmrcq20","country_code":"CA","type":"education","lineage":["https://openalex.org/I141945490"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Clarence S. P. Lee","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Faculty of Applied Sciences, University of British Columbia, Vancouver, B.C., Canada V6T 1Z4"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Faculty of Applied Sciences, University of British Columbia, Vancouver, B.C., Canada V6T 1Z4","institution_ids":["https://openalex.org/I141945490"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5013246362","display_name":"Steven J. E. Wilton","orcid":"https://orcid.org/0000-0002-1241-6690"},"institutions":[{"id":"https://openalex.org/I141945490","display_name":"University of British Columbia","ror":"https://ror.org/03rmrcq20","country_code":"CA","type":"education","lineage":["https://openalex.org/I141945490"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Steven J. E. Wilton","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Faculty of Applied Sciences, University of British Columbia, Vancouver, B.C., Canada V6T 1Z4"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Faculty of Applied Sciences, University of British Columbia, Vancouver, B.C., Canada V6T 1Z4","institution_ids":["https://openalex.org/I141945490"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5042976080"],"corresponding_institution_ids":["https://openalex.org/I141945490"],"apc_list":{"value":925,"currency":"USD","value_usd":925},"apc_paid":{"value":925,"currency":"USD","value_usd":925},"fwci":0.6021,"has_fulltext":true,"cited_by_count":3,"citation_normalized_percentile":{"value":0.73065905,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"2008","issue":null,"first_page":"1","last_page":"13"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.785114586353302},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.683414101600647},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5727080702781677},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.4933432638645172},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.47950059175491333},{"id":"https://openalex.org/keywords/logic-block","display_name":"Logic block","score":0.4351179897785187},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.42846667766571045},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.41986793279647827},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.41722372174263},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3654254972934723},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3398855924606323},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.32713598012924194},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3057112991809845},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.26235097646713257},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.15578743815422058},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.08696776628494263}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.785114586353302},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.683414101600647},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5727080702781677},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.4933432638645172},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.47950059175491333},{"id":"https://openalex.org/C2778325283","wikidata":"https://www.wikidata.org/wiki/Q1125244","display_name":"Logic block","level":3,"score":0.4351179897785187},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.42846667766571045},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.41986793279647827},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.41722372174263},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3654254972934723},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3398855924606323},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.32713598012924194},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3057112991809845},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.26235097646713257},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.15578743815422058},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.08696776628494263},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":4,"locations":[{"id":"doi:10.1155/2008/751863","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2008/751863","pdf_url":"https://downloads.hindawi.com/journals/ijrc/2008/751863.pdf","source":{"id":"https://openalex.org/S194867674","display_name":"International Journal of Reconfigurable Computing","issn_l":"1687-7195","issn":["1687-7195","1687-7209"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Journal of Reconfigurable Computing","raw_type":"journal-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.224.5753","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.224.5753","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ece.ubc.ca/%7Estevew/papers/pdf/scott_memory.pdf","raw_type":"text"},{"id":"pmh:oai:doaj.org/article:6b21f2ce9b26425492404be56d2a22dd","is_oa":false,"landing_page_url":"https://doaj.org/article/6b21f2ce9b26425492404be56d2a22dd","pdf_url":null,"source":{"id":"https://openalex.org/S4306401280","display_name":"DOAJ (DOAJ: Directory of Open Access Journals)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"International Journal of Reconfigurable Computing, Vol 2008 (2008)","raw_type":"article"},{"id":"pmh:oai:doaj.org/article:c86d798df2284f129a7c11977ee72e56","is_oa":false,"landing_page_url":"https://doaj.org/article/c86d798df2284f129a7c11977ee72e56","pdf_url":null,"source":{"id":"https://openalex.org/S4306401280","display_name":"DOAJ (DOAJ: Directory of Open Access Journals)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"International Journal of Reconfigurable Computing, Vol 2008 (2008)","raw_type":"article"}],"best_oa_location":{"id":"doi:10.1155/2008/751863","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2008/751863","pdf_url":"https://downloads.hindawi.com/journals/ijrc/2008/751863.pdf","source":{"id":"https://openalex.org/S194867674","display_name":"International Journal of Reconfigurable Computing","issn_l":"1687-7195","issn":["1687-7195","1687-7209"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Journal of Reconfigurable Computing","raw_type":"journal-article"},"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320334593","display_name":"Natural Sciences and Engineering Research Council of Canada","ror":"https://ror.org/01h531d29"}],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W1997936925.pdf","grobid_xml":"https://content.openalex.org/works/W1997936925.grobid-xml"},"referenced_works_count":16,"referenced_works":["https://openalex.org/W1523051745","https://openalex.org/W1574542534","https://openalex.org/W1969802502","https://openalex.org/W1985438012","https://openalex.org/W1985856707","https://openalex.org/W2001576395","https://openalex.org/W2052067881","https://openalex.org/W2077892593","https://openalex.org/W2095558812","https://openalex.org/W2105715355","https://openalex.org/W2124021899","https://openalex.org/W2128473621","https://openalex.org/W2132225593","https://openalex.org/W2144736151","https://openalex.org/W2146589686","https://openalex.org/W4246961877"],"related_works":["https://openalex.org/W2295734895","https://openalex.org/W2014521732","https://openalex.org/W3012528295","https://openalex.org/W2024574431","https://openalex.org/W4239932082","https://openalex.org/W2387100797","https://openalex.org/W2787072969","https://openalex.org/W1522517392","https://openalex.org/W2424214691","https://openalex.org/W3207508415"],"abstract_inverted_index":{"We":[0,81,101],"investigate":[1],"the":[2,40,49,62,68,71,75,78,123,163],"power":[3,52,99,111,164,185],"and":[4,53,74,144,173,182],"energy":[5,54],"implications":[6],"of":[7,27,30,58,64,70,77,91],"using":[8,176],"embedded":[9,85],"FPGA":[10],"memory":[11,66,72,79,124],"blocks":[12,105,125],"to":[13],"implement":[14],"logic.":[15],"Previous":[16],"studies":[17,36],"have":[18],"shown":[19],"that":[20,83,104,135,151],"this":[21,45,94],"technique":[22,95],"provides":[23],"extremely":[24],"dense":[25],"implementations":[26,90],"some":[28,152],"types":[29],"logic":[31,146],"circuits,":[32,93],"however,":[33],"these":[34],"previous":[35],"did":[37],"not":[38],"evaluate":[39],"impact":[41],"on":[42,51,158,195],"power.":[43],"In":[44],"paper,":[46],"we":[47,133],"measure":[48],"effects":[50],"as":[55,128,130],"a":[56,149,183,196],"function":[57],"three":[59],"architectural":[60],"parameters:":[61],"number":[63],"available":[65],"blocks,":[67,73],"size":[69],"flexibility":[76],"blocks.":[80],"show":[82,103,134],"although":[84],"memories":[86],"provide":[87],"area":[88],"efficient":[89,112],"many":[92],"results":[96,168,188],"in":[97,147],"additional":[98],"consumption.":[100],"also":[102,190],"containing":[106,115],"smaller-memory":[107],"arrays":[108,139,154],"are":[109],"more":[110],"than":[113],"those":[114],"large":[116],"arrays,":[117],"but":[118],"for":[119],"most":[120],"array":[121],"sizes,":[122],"should":[126],"be":[127,156],"flexible":[129],"possible.":[131],"Finally,":[132],"by":[136],"combining":[137],"physical":[138,153,179],"into":[140],"larger":[141],"logical":[142],"memories,":[143],"mapping":[145],"such":[148],"way":[150],"can":[155,161],"disabled":[157],"each":[159],"access,":[160],"reduce":[162],"consumption":[165],"penalty.":[166],"The":[167],"were":[169,189],"obtained":[170],"from":[171],"place":[172],"routed":[174],"circuits":[175],"standard":[177],"experimental":[178],"design":[180],"tools":[181],"detailed":[184],"model.":[186],"Several":[187],"verified":[191],"through":[192],"current":[193],"measurements":[194],"0.13":[197],"<mml:math":[198],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"><mml:mi>\u03bc</mml:mi></mml:math>m":[199],"CMOS":[200],"FPGA.":[201]},"counts_by_year":[{"year":2024,"cited_by_count":1}],"updated_date":"2026-07-23T08:03:31.855105","created_date":"2025-10-10T00:00:00"}