{"id":"https://openalex.org/W2173609013","doi":"https://doi.org/10.1155/2008/736203","title":"The Coarse-Grained/Fine-Grained Logic Interface in FPGAs with Embedded Floating-Point Arithmetic Units","display_name":"The Coarse-Grained/Fine-Grained Logic Interface in FPGAs with Embedded Floating-Point Arithmetic Units","publication_year":2008,"publication_date":"2008-01-01","ids":{"openalex":"https://openalex.org/W2173609013","doi":"https://doi.org/10.1155/2008/736203","mag":"2173609013"},"language":"en","primary_location":{"id":"doi:10.1155/2008/736203","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2008/736203","pdf_url":"https://downloads.hindawi.com/journals/ijrc/2008/736203.pdf","source":{"id":"https://openalex.org/S194867674","display_name":"International Journal of Reconfigurable Computing","issn_l":"1687-7195","issn":["1687-7195","1687-7209"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Journal of Reconfigurable Computing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://downloads.hindawi.com/journals/ijrc/2008/736203.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102737997","display_name":"Chi Wai Yu","orcid":"https://orcid.org/0000-0002-3900-838X"},"institutions":[{"id":"https://openalex.org/I47508984","display_name":"Imperial College London","ror":"https://ror.org/041kmwe10","country_code":"GB","type":"education","lineage":["https://openalex.org/I47508984"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Chi Wai Yu","raw_affiliation_strings":["Department of Computing, Imperial College London, London SW7 2AZ, UK"],"affiliations":[{"raw_affiliation_string":"Department of Computing, Imperial College London, London SW7 2AZ, UK","institution_ids":["https://openalex.org/I47508984"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074883642","display_name":"Julien Lamoureux","orcid":null},"institutions":[{"id":"https://openalex.org/I141945490","display_name":"University of British Columbia","ror":"https://ror.org/03rmrcq20","country_code":"CA","type":"education","lineage":["https://openalex.org/I141945490"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Julien Lamoureux","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of British Columbia, Vancouver, British Columbia, Canada V6T 1Z4"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of British Columbia, Vancouver, British Columbia, Canada V6T 1Z4","institution_ids":["https://openalex.org/I141945490"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013246362","display_name":"Steven J. E. Wilton","orcid":"https://orcid.org/0000-0002-1241-6690"},"institutions":[{"id":"https://openalex.org/I141945490","display_name":"University of British Columbia","ror":"https://ror.org/03rmrcq20","country_code":"CA","type":"education","lineage":["https://openalex.org/I141945490"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Steven J. E. Wilton","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of British Columbia, Vancouver, British Columbia, Canada V6T 1Z4"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of British Columbia, Vancouver, British Columbia, Canada V6T 1Z4","institution_ids":["https://openalex.org/I141945490"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5107994859","display_name":"Philip H. W. Leong","orcid":"https://orcid.org/0000-0002-3923-3499"},"institutions":[{"id":"https://openalex.org/I177725633","display_name":"Chinese University of Hong Kong","ror":"https://ror.org/00t33hh48","country_code":"HK","type":"education","lineage":["https://openalex.org/I177725633"]}],"countries":["HK"],"is_corresponding":false,"raw_author_name":"Philip H. W. Leong","raw_affiliation_strings":["Department of Computer Science and Engineering, Chinese University of Hong Kong, Hong Kong"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Chinese University of Hong Kong, Hong Kong","institution_ids":["https://openalex.org/I177725633"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5057940557","display_name":"Wayne Luk","orcid":"https://orcid.org/0000-0002-6750-927X"},"institutions":[{"id":"https://openalex.org/I47508984","display_name":"Imperial College London","ror":"https://ror.org/041kmwe10","country_code":"GB","type":"education","lineage":["https://openalex.org/I47508984"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Wayne Luk","raw_affiliation_strings":["Department of Computing, Imperial College London, London SW7 2AZ, UK"],"affiliations":[{"raw_affiliation_string":"Department of Computing, Imperial College London, London SW7 2AZ, UK","institution_ids":["https://openalex.org/I47508984"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5102737997"],"corresponding_institution_ids":["https://openalex.org/I47508984"],"apc_list":{"value":900,"currency":"USD","value_usd":900},"apc_paid":{"value":900,"currency":"USD","value_usd":900},"fwci":1.356,"has_fulltext":true,"cited_by_count":8,"citation_normalized_percentile":{"value":0.83282351,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"2008","issue":null,"first_page":"1","last_page":"10"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7800197601318359},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7048014402389526},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.6010196805000305},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5897331833839417},{"id":"https://openalex.org/keywords/floating-point","display_name":"Floating point","score":0.5090991854667664},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.499096155166626},{"id":"https://openalex.org/keywords/point","display_name":"Point (geometry)","score":0.4338603615760803},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.38371843099594116},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.15724527835845947},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.114702969789505},{"id":"https://openalex.org/keywords/geometry","display_name":"Geometry","score":0.05885067582130432}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7800197601318359},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7048014402389526},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.6010196805000305},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5897331833839417},{"id":"https://openalex.org/C84211073","wikidata":"https://www.wikidata.org/wiki/Q117879","display_name":"Floating point","level":2,"score":0.5090991854667664},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.499096155166626},{"id":"https://openalex.org/C28719098","wikidata":"https://www.wikidata.org/wiki/Q44946","display_name":"Point (geometry)","level":2,"score":0.4338603615760803},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.38371843099594116},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.15724527835845947},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.114702969789505},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.05885067582130432},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1155/2008/736203","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2008/736203","pdf_url":"https://downloads.hindawi.com/journals/ijrc/2008/736203.pdf","source":{"id":"https://openalex.org/S194867674","display_name":"International Journal of Reconfigurable Computing","issn_l":"1687-7195","issn":["1687-7195","1687-7209"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Journal of Reconfigurable Computing","raw_type":"journal-article"},{"id":"pmh:oai:doaj.org/article:09c184a2816e49188bccd3777a7c9888","is_oa":true,"landing_page_url":"https://doaj.org/article/09c184a2816e49188bccd3777a7c9888","pdf_url":null,"source":{"id":"https://openalex.org/S112646816","display_name":"SHILAP Revista de lepidopterolog\u00eda","issn_l":"0300-5267","issn":["0300-5267","2340-4078"],"is_oa":true,"is_in_doaj":true,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":"cc-by-sa","license_id":"https://openalex.org/licenses/cc-by-sa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"International Journal of Reconfigurable Computing, Vol 2008 (2008)","raw_type":"article"}],"best_oa_location":{"id":"doi:10.1155/2008/736203","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2008/736203","pdf_url":"https://downloads.hindawi.com/journals/ijrc/2008/736203.pdf","source":{"id":"https://openalex.org/S194867674","display_name":"International Journal of Reconfigurable Computing","issn_l":"1687-7195","issn":["1687-7195","1687-7209"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Journal of Reconfigurable Computing","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G1934935867","display_name":null,"funder_award_id":"Engineering and Physical Sciences R","funder_id":"https://openalex.org/F4320334627","funder_display_name":"Engineering and Physical Sciences Research Council"},{"id":"https://openalex.org/G6630693793","display_name":"Reconfigurable Architectures for Floating Point Applications","funder_award_id":"EP/D060567/1","funder_id":"https://openalex.org/F4320334627","funder_display_name":"Engineering and Physical Sciences Research Council"},{"id":"https://openalex.org/G7588546963","display_name":null,"funder_award_id":"EP/D060567/1","funder_id":"https://openalex.org/F4320334627","funder_display_name":"Engineering and Physical Sciences Research Council"},{"id":"https://openalex.org/G8360944955","display_name":null,"funder_award_id":"EP/C549481/1","funder_id":"https://openalex.org/F4320334627","funder_display_name":"Engineering and Physical Sciences Research Council"}],"funders":[{"id":"https://openalex.org/F4320334627","display_name":"Engineering and Physical Sciences Research Council","ror":"https://ror.org/0439y7842"}],"has_content":{"pdf":true,"grobid_xml":false},"content_urls":{"pdf":"https://content.openalex.org/works/W2173609013.pdf"},"referenced_works_count":13,"referenced_works":["https://openalex.org/W1523051745","https://openalex.org/W1954572403","https://openalex.org/W1977850862","https://openalex.org/W2035626076","https://openalex.org/W2043510289","https://openalex.org/W2108073851","https://openalex.org/W2111345110","https://openalex.org/W2119003581","https://openalex.org/W2147903260","https://openalex.org/W2154356865","https://openalex.org/W2159741920","https://openalex.org/W2165055337","https://openalex.org/W2170245550"],"related_works":["https://openalex.org/W2111241003","https://openalex.org/W2355315220","https://openalex.org/W4200391368","https://openalex.org/W2210979487","https://openalex.org/W2316202402","https://openalex.org/W2074043759","https://openalex.org/W3146360095","https://openalex.org/W2184011203","https://openalex.org/W3028347934","https://openalex.org/W2185692674"],"abstract_inverted_index":{"This":[0],"paper":[1],"examines":[2],"the":[3,21,34,72,75,89,98,109,125],"interface":[4,44],"between":[5,27,97],"fine-grained":[6,35],"and":[7,25,33,51,100],"coarse-grained":[8,106],"programmable":[9],"logic":[10,36],"in":[11,38,45],"FPGAs.":[12,39],"Specifically,":[13],"it":[14],"presents":[15],"an":[16],"empirical":[17],"study":[18],"that":[19,57],"covers":[20],"location,":[22],"pin":[23],"arrangement,":[24],"interconnect":[26],"embedded":[28,52,92,118,128],"floating":[29],"point":[30],"units":[31],"(FPUs)":[32],"fabric":[37],"It":[40],"also":[41],"studies":[42],"this":[43],"FPGAs":[46,116],"which":[47],"contain":[48],"both":[49],"FPUs":[50,59],"memories.":[53],"The":[54,114],"results":[55],"show":[56],"(1)":[58],"should":[60,68,81,94],"have":[61],"a":[62],"square":[63],"aspect":[64],"ratio;":[65],"(2)":[66],"they":[67],"be":[69,82,95],"positioned":[70],"near":[71],"center":[73],"of":[74,88],"FPGA;":[76],"(3)":[77],"their":[78],"I/O":[79,104],"pins":[80],"arranged":[83],"around":[84],"all":[85],"four":[86],"sides":[87],"FPU;":[90],"(4)":[91],"memory":[93,119,129],"located":[96],"FPUs;":[99],"(5)":[101],"connecting":[102],"higher":[103],"density":[105],"blocks":[107],"increases":[108],"demand":[110],"for":[111],"routing":[112],"resources.":[113],"hybrid":[115],"with":[117],"required":[120],"12%":[121],"wider":[122],"channels":[123],"than":[124],"case":[126],"where":[127],"is":[130],"not":[131],"used.":[132]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2026-04-10T15:06:20.359241","created_date":"2025-10-10T00:00:00"}