{"id":"https://openalex.org/W2000140105","doi":"https://doi.org/10.1155/2008/517919","title":"Fine Control of Local Whitespace in Placement","display_name":"Fine Control of Local Whitespace in Placement","publication_year":2008,"publication_date":"2008-01-01","ids":{"openalex":"https://openalex.org/W2000140105","doi":"https://doi.org/10.1155/2008/517919","mag":"2000140105"},"language":"en","primary_location":{"id":"doi:10.1155/2008/517919","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2008/517919","pdf_url":"https://downloads.hindawi.com/archive/2008/517919.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://downloads.hindawi.com/archive/2008/517919.pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110108098","display_name":"Jarrod A. Roy","orcid":null},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Jarrod A. Roy","raw_affiliation_strings":["Department of EECS, University of Michigan, 2260 Hayward Avenue, Ann Arbor, MI 48109-2121, USA"],"affiliations":[{"raw_affiliation_string":"Department of EECS, University of Michigan, 2260 Hayward Avenue, Ann Arbor, MI 48109-2121, USA","institution_ids":["https://openalex.org/I27837315"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067863557","display_name":"David Papa","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156936","display_name":"IBM Research - Austin","ror":"https://ror.org/05gjbbg60","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210156936"]},{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"David A. Papa","raw_affiliation_strings":["Department of EECS, University of Michigan, 2260 Hayward Avenue, Ann Arbor, MI 48109-2121, USA","IBM Austin Research Lab, IBM Corporation, 11501 Burnet Road, Austin, TX 78758, USA"],"affiliations":[{"raw_affiliation_string":"Department of EECS, University of Michigan, 2260 Hayward Avenue, Ann Arbor, MI 48109-2121, USA","institution_ids":["https://openalex.org/I27837315"]},{"raw_affiliation_string":"IBM Austin Research Lab, IBM Corporation, 11501 Burnet Road, Austin, TX 78758, USA","institution_ids":["https://openalex.org/I4210156936"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5065370018","display_name":"Igor L. Markov","orcid":"https://orcid.org/0000-0002-3826-527X"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Igor L. Markov","raw_affiliation_strings":["Department of EECS, University of Michigan, 2260 Hayward Avenue, Ann Arbor, MI 48109-2121, USA"],"affiliations":[{"raw_affiliation_string":"Department of EECS, University of Michigan, 2260 Hayward Avenue, Ann Arbor, MI 48109-2121, USA","institution_ids":["https://openalex.org/I27837315"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5110108098"],"corresponding_institution_ids":["https://openalex.org/I27837315"],"apc_list":null,"apc_paid":null,"fwci":0.339,"has_fulltext":true,"cited_by_count":2,"citation_normalized_percentile":{"value":0.62421782,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"2008","issue":"1","first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8573353290557861},{"id":"https://openalex.org/keywords/design-for-manufacturability","display_name":"Design for manufacturability","score":0.5589668154716492},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.4504677355289459},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.359710693359375},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10244148969650269}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8573353290557861},{"id":"https://openalex.org/C62064638","wikidata":"https://www.wikidata.org/wiki/Q553878","display_name":"Design for manufacturability","level":2,"score":0.5589668154716492},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.4504677355289459},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.359710693359375},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10244148969650269},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1155/2008/517919","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2008/517919","pdf_url":"https://downloads.hindawi.com/archive/2008/517919.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1155/2008/517919","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2008/517919","pdf_url":"https://downloads.hindawi.com/archive/2008/517919.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G848032724","display_name":null,"funder_award_id":"Science","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320332180","display_name":"Defense Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"}],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2000140105.pdf","grobid_xml":"https://content.openalex.org/works/W2000140105.grobid-xml"},"referenced_works_count":32,"referenced_works":["https://openalex.org/W1525696892","https://openalex.org/W1963951527","https://openalex.org/W1999938868","https://openalex.org/W2002525234","https://openalex.org/W2009085265","https://openalex.org/W2012443593","https://openalex.org/W2016999260","https://openalex.org/W2041433119","https://openalex.org/W2068510192","https://openalex.org/W2080409033","https://openalex.org/W2097405447","https://openalex.org/W2098851424","https://openalex.org/W2103005858","https://openalex.org/W2115762048","https://openalex.org/W2120315922","https://openalex.org/W2123223015","https://openalex.org/W2132823746","https://openalex.org/W2132915653","https://openalex.org/W2133367791","https://openalex.org/W2148148037","https://openalex.org/W2157255030","https://openalex.org/W2160408075","https://openalex.org/W2161509521","https://openalex.org/W2172061077","https://openalex.org/W2173598676","https://openalex.org/W2175246050","https://openalex.org/W2178255440","https://openalex.org/W3143507316","https://openalex.org/W4231946008","https://openalex.org/W4232686547","https://openalex.org/W4237664122","https://openalex.org/W4251711182"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2094969048","https://openalex.org/W994558755","https://openalex.org/W3035935536","https://openalex.org/W2010746423","https://openalex.org/W2372119205","https://openalex.org/W2117710422","https://openalex.org/W1987106725","https://openalex.org/W4283270028","https://openalex.org/W1787300689"],"abstract_inverted_index":{"In":[0],"modern":[1],"design":[2],"methodologies,":[3],"a":[4,26,38,65],"large":[5,108],"fraction":[6,68],"of":[7,28,69,74,84,123,137,140],"chip":[8],"area":[9],"during":[10],"placement":[11,146,158],"is":[12,23],"left":[13],"unused":[14],"by":[15,100],"standard":[16],"cells":[17],"and":[18,45,51,89,129,148],"allocated":[19],"as":[20,37,142,144],"\u201cwhitespace.\"":[21],"This":[22],"done":[24],"for":[25,33,82,111],"variety":[27],"reasons":[29],"including":[30],"the":[31,75,107,112,116,135,155],"need":[32],"subsequent":[34],"buffer":[35],"insertion,":[36],"means":[39],"to":[40,52,96],"ensure":[41],"routability,":[42],"signal":[43],"integrity,":[44],"low":[46,150],"coupling":[47],"capacitance":[48],"between":[49],"wires,":[50],"improve":[53,98,134],"yield":[54],"through":[55],"DFM":[56],"optimizations.":[57],"To":[58],"this":[59],"end,":[60],"layout":[61],"constraints":[62],"often":[63],"require":[64],"certain":[66],"minimum":[67],"whitespace":[70,85,102,124,138],"in":[71,86,103,115,125],"each":[72],"region":[73],"chip.":[76],"Our":[77,92,131],"work":[78],"introduces":[79],"several":[80],"techniques":[81,132],"allocation":[83,139],"global,":[87],"detail,":[88],"incremental":[90],"placement.":[91],"experiments":[93],"show":[94],"how":[95],"efficiently":[97],"wirelength":[99],"reallocating":[101],"legal":[104],"placements":[105],"at":[106],"scale.":[109],"Additionally,":[110],"first":[113],"time":[114],"literature,":[117],"we":[118],"empirically":[119],"demonstrate":[120],"high\u2010precision":[121],"control":[122],"designs":[126,153],"with":[127,160],"macros":[128],"obstacles.":[130],"consistently":[133],"quality":[136],"top\u2010down":[141],"well":[143],"analytical":[145],"methods":[147],"achieve":[149],"penalties":[151],"on":[152],"from":[154],"ISPD":[156],"2006":[157],"contest":[159],"minimal":[161],"interconnect":[162],"increase.":[163]},"counts_by_year":[{"year":2012,"cited_by_count":1}],"updated_date":"2026-04-10T15:06:20.359241","created_date":"2025-10-10T00:00:00"}
