{"id":"https://openalex.org/W2126311241","doi":"https://doi.org/10.1155/2001/96353","title":"A Fast Algorithm for Transistor Folding","display_name":"A Fast Algorithm for Transistor Folding","publication_year":1999,"publication_date":"1999-09-20","ids":{"openalex":"https://openalex.org/W2126311241","doi":"https://doi.org/10.1155/2001/96353","mag":"2126311241"},"language":"en","primary_location":{"id":"doi:10.1155/2001/96353","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2001/96353","pdf_url":"https://downloads.hindawi.com/archive/2001/096353.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://downloads.hindawi.com/archive/2001/096353.pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5038820608","display_name":"Edward Y. Cheng","orcid":"https://orcid.org/0000-0001-6125-9671"},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Edward Y. C. Cheng","raw_affiliation_strings":["Department of Computer and Information Science and Engineering, University of Florida"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer and Information Science and Engineering, University of Florida","institution_ids":["https://openalex.org/I33213144"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5070824596","display_name":"Sartaj Sahni","orcid":"https://orcid.org/0000-0002-8129-1676"},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Sartaj Sahni","raw_affiliation_strings":["Department of Computer and Information Science and Engineering, University of Florida"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer and Information Science and Engineering, University of Florida","institution_ids":["https://openalex.org/I33213144"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5070824596"],"corresponding_institution_ids":["https://openalex.org/I33213144"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":5,"citation_normalized_percentile":{"value":0.20153128,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"12","issue":"1","first_page":"53","last_page":"60"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9879999756813049,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/folding","display_name":"Folding (DSP implementation)","score":0.7364400029182434},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5760161280632019},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.550872802734375},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.49359071254730225},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18625253438949585},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.16197264194488525},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.04868695139884949}],"concepts":[{"id":"https://openalex.org/C2776545253","wikidata":"https://www.wikidata.org/wiki/Q5464292","display_name":"Folding (DSP implementation)","level":2,"score":0.7364400029182434},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5760161280632019},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.550872802734375},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.49359071254730225},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18625253438949585},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.16197264194488525},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.04868695139884949}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1155/2001/96353","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2001/96353","pdf_url":"https://downloads.hindawi.com/archive/2001/096353.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.13.7370","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.13.7370","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cise.ufl.edu/~sahni/papers/tfold.pdf","raw_type":"text"}],"best_oa_location":{"id":"doi:10.1155/2001/96353","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2001/96353","pdf_url":"https://downloads.hindawi.com/archive/2001/096353.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.5899999737739563}],"awards":[],"funders":[{"id":"https://openalex.org/F4320338281","display_name":"Army Research Office","ror":"https://ror.org/05epdh915"}],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2126311241.pdf","grobid_xml":"https://content.openalex.org/works/W2126311241.grobid-xml"},"referenced_works_count":10,"referenced_works":["https://openalex.org/W1569550779","https://openalex.org/W1987067207","https://openalex.org/W2056691852","https://openalex.org/W2060393099","https://openalex.org/W2092159784","https://openalex.org/W2103331344","https://openalex.org/W2106465450","https://openalex.org/W2113320865","https://openalex.org/W2135250302","https://openalex.org/W2148267608"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2748952813","https://openalex.org/W2051487156","https://openalex.org/W2073681303","https://openalex.org/W2390279801","https://openalex.org/W4391913857","https://openalex.org/W2358668433","https://openalex.org/W4396701345","https://openalex.org/W2148267608","https://openalex.org/W2126311241"],"abstract_inverted_index":{"Transistor":[0],"folding":[1],"reduces":[2],"the":[3,68],"area":[4],"of":[5,11],"row\u2010based":[6],"designs":[7],"that":[8,54],"employ":[9],"transistors":[10],"different":[12],"size.":[13],"Kim":[14],"and":[15],"Kang":[16],"[1]":[17],"have":[18],"developed":[19],"an":[20,40],"O":[21,41],"(":[22,42],"m":[23,26,32,43,65],"2":[24,44],"log":[25],")":[27,45],"algorithm":[28,46,56],"to":[29,59],"optimally":[30],"fold":[31],"transistor":[33,49],"pairs.":[34],"In":[35],"this":[36],"paper":[37],"we":[38],"develop":[39],"for":[47,64],"optimal":[48],"folding.":[50],"Our":[51],"experiments":[52],"indicate":[53],"our":[55],"runs":[57],"3":[58],"60":[60],"times":[61],"as":[62],"fast":[63],"values":[66],"in":[67],"range":[69],"(100,":[70],"100,000).":[71]},"counts_by_year":[{"year":2016,"cited_by_count":2},{"year":2013,"cited_by_count":1}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}
