{"id":"https://openalex.org/W2038220260","doi":"https://doi.org/10.1155/2000/79281","title":"Testing and Diagnosing Dynamic Reconfigurable FPGA","display_name":"Testing and Diagnosing Dynamic Reconfigurable FPGA","publication_year":1999,"publication_date":"1999-10-01","ids":{"openalex":"https://openalex.org/W2038220260","doi":"https://doi.org/10.1155/2000/79281","mag":"2038220260"},"language":"en","primary_location":{"id":"doi:10.1155/2000/79281","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2000/79281","pdf_url":"https://downloads.hindawi.com/archive/2000/079281.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869","https://openalex.org/P4310320595"],"host_organization_lineage_names":["Hindawi Publishing Corporation","Wiley"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://downloads.hindawi.com/archive/2000/079281.pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102066701","display_name":"Chi-Feng Wu","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Chi-Feng Wu","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of California","Lab. for Reliable Computing (Rm. 807), Department of Electrical Engineering, National Tsing Hua University, 101, Sec. 2, Kuang Fu Rd., Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of California","institution_ids":[]},{"raw_affiliation_string":"Lab. for Reliable Computing (Rm. 807), Department of Electrical Engineering, National Tsing Hua University, 101, Sec. 2, Kuang Fu Rd., Taiwan","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075548524","display_name":"Cheng\u2010Wen Wu","orcid":"https://orcid.org/0000-0001-8614-7908"},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chi-Feng Wu","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of California","Lab. for Reliable Computing (Rm. 807), Department of Electrical Engineering, National Tsing Hua University, 101, Sec. 2, Kuang Fu Rd., Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of California","institution_ids":[]},{"raw_affiliation_string":"Lab. for Reliable Computing (Rm. 807), Department of Electrical Engineering, National Tsing Hua University, 101, Sec. 2, Kuang Fu Rd., Taiwan","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Cheng-Wen Wu","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Cheng-Wen Wu","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of California","Lab. for Reliable Computing (Rm. 807), Department of Electrical Engineering, National Tsing Hua University, 101, Sec. 2, Kuang Fu Rd., Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of California","institution_ids":[]},{"raw_affiliation_string":"Lab. for Reliable Computing (Rm. 807), Department of Electrical Engineering, National Tsing Hua University, 101, Sec. 2, Kuang Fu Rd., Taiwan","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"last","author":{"id":null,"display_name":"Cheng-Wen Wu","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Cheng-Wen Wu","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of California","Lab. for Reliable Computing (Rm. 807), Department of Electrical Engineering, National Tsing Hua University, 101, Sec. 2, Kuang Fu Rd., Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of California","institution_ids":[]},{"raw_affiliation_string":"Lab. for Reliable Computing (Rm. 807), Department of Electrical Engineering, National Tsing Hua University, 101, Sec. 2, Kuang Fu Rd., Taiwan","institution_ids":["https://openalex.org/I25846049"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5102066701"],"corresponding_institution_ids":["https://openalex.org/I25846049"],"apc_list":null,"apc_paid":null,"fwci":0.4037,"has_fulltext":true,"cited_by_count":2,"citation_normalized_percentile":{"value":0.68540012,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":93},"biblio":{"volume":"10","issue":"3","first_page":"321","last_page":"333"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reconfigurability","display_name":"Reconfigurability","score":0.9701237678527832},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.9077363610267639},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.9052802324295044},{"id":"https://openalex.org/keywords/emulation","display_name":"Emulation","score":0.899479866027832},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.7525720596313477},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6892214417457581},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6372556686401367},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4918351173400879}],"concepts":[{"id":"https://openalex.org/C2780149590","wikidata":"https://www.wikidata.org/wiki/Q7302742","display_name":"Reconfigurability","level":2,"score":0.9701237678527832},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.9077363610267639},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.9052802324295044},{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.899479866027832},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.7525720596313477},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6892214417457581},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6372556686401367},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4918351173400879},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1155/2000/79281","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2000/79281","pdf_url":"https://downloads.hindawi.com/archive/2000/079281.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869","https://openalex.org/P4310320595"],"host_organization_lineage_names":["Hindawi Publishing Corporation","Wiley"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},{"id":"pmh:oai:doaj.org/article:4181a3223fa34010aa120412d16ec2d3","is_oa":false,"landing_page_url":"https://doaj.org/article/4181a3223fa34010aa120412d16ec2d3","pdf_url":null,"source":{"id":"https://openalex.org/S4306401280","display_name":"DOAJ (DOAJ: Directory of Open Access Journals)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"VLSI Design, Vol 10, Iss 3, Pp 321-333 (2000)","raw_type":"article"}],"best_oa_location":{"id":"doi:10.1155/2000/79281","is_oa":true,"landing_page_url":"https://doi.org/10.1155/2000/79281","pdf_url":"https://downloads.hindawi.com/archive/2000/079281.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869","https://openalex.org/P4310320595"],"host_organization_lineage_names":["Hindawi Publishing Corporation","Wiley"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2038220260.pdf","grobid_xml":"https://content.openalex.org/works/W2038220260.grobid-xml"},"referenced_works_count":24,"referenced_works":["https://openalex.org/W1496904053","https://openalex.org/W1595904496","https://openalex.org/W1905191145","https://openalex.org/W1914809015","https://openalex.org/W1921192440","https://openalex.org/W1992040665","https://openalex.org/W2030044762","https://openalex.org/W2051573100","https://openalex.org/W2104622122","https://openalex.org/W2105828059","https://openalex.org/W2118980105","https://openalex.org/W2119588320","https://openalex.org/W2140146501","https://openalex.org/W2140645577","https://openalex.org/W2157009629","https://openalex.org/W2162529266","https://openalex.org/W2170564220","https://openalex.org/W2263452264","https://openalex.org/W6629762113","https://openalex.org/W6635780974","https://openalex.org/W6640244516","https://openalex.org/W6680833289","https://openalex.org/W6684575624","https://openalex.org/W6685228498"],"related_works":["https://openalex.org/W2152623100","https://openalex.org/W25204318","https://openalex.org/W2096417281","https://openalex.org/W2138895528","https://openalex.org/W2077035242","https://openalex.org/W2038220260","https://openalex.org/W2340647897","https://openalex.org/W3120729951","https://openalex.org/W2808484818","https://openalex.org/W1574948540"],"abstract_inverted_index":{"Dynamic":[0],"reconfigurable":[1,32],"field\u2010programmable":[2],"logic":[3],"arrays":[4],"(FPGAs)":[5],"are":[6],"receiving":[7],"notable":[8],"attention":[9],"because":[10],"of":[11,45,52,66,82],"their":[12],"much":[13],"shorter":[14],"reconfiguration":[15,24],"time":[16,25],"as":[17,31],"compared":[18],"with":[19],"traditional":[20],"FPGAs.":[21],"The":[22],"short":[23],"is":[26],"vital":[27],"to":[28],"applications":[29],"such":[30],"computing":[33],"and":[34,43,74],"emulation.":[35],"We":[36,56],"show":[37,87],"in":[38],"this":[39],"paper":[40],"that":[41,88],"testing":[42,63,94],"diagnosis":[44,75],"the":[46,64,67,83,93],"FPGA":[47],"also":[48],"can":[49],"take":[50],"advantage":[51],"its":[53],"dynamic":[54],"reconfigurability.":[55],"first":[57],"propose":[58],"an":[59],"efficient":[60],"methodology":[61],"for":[62,99],"interconnects":[65],"FPGA,":[68],"then":[69],"present":[70],"several":[71],"universal":[72],"test":[73],"approaches":[76],"which":[77],"cover":[78],"all":[79],"functional":[80],"units":[81],"FPGA.":[84],"Experimental":[85],"results":[86],"our":[89],"approach":[90],"significantly":[91],"reduces":[92],"time,":[95],"without":[96],"additional":[97],"cost":[98],"diagnosis.":[100]},"counts_by_year":[{"year":2020,"cited_by_count":1}],"updated_date":"2026-08-31T07:19:18.363097","created_date":"2025-10-10T00:00:00"}
