{"id":"https://openalex.org/W2058312941","doi":"https://doi.org/10.1155/1999/16415","title":"Computation Reordering: A Novel Transformation for Low Power DSP Synthesis","display_name":"Computation Reordering: A Novel Transformation for Low Power DSP Synthesis","publication_year":1998,"publication_date":"1998-06-21","ids":{"openalex":"https://openalex.org/W2058312941","doi":"https://doi.org/10.1155/1999/16415","mag":"2058312941"},"language":"en","primary_location":{"id":"doi:10.1155/1999/16415","is_oa":true,"landing_page_url":"https://doi.org/10.1155/1999/16415","pdf_url":"https://downloads.hindawi.com/archive/1999/016415.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869","https://openalex.org/P4310320595"],"host_organization_lineage_names":["Hindawi Publishing Corporation","Wiley"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://downloads.hindawi.com/archive/1999/016415.pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5108075591","display_name":"K. Masselos","orcid":null},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":true,"raw_author_name":"K. Masselos","raw_affiliation_strings":["VLSI Design Laboratory, Department of Electrical and Computer Engineering, University of Patras"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VLSI Design Laboratory, Department of Electrical and Computer Engineering, University of Patras","institution_ids":["https://openalex.org/I174878644"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012461069","display_name":"P. Merakos","orcid":null},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"P. Merakos","raw_affiliation_strings":["VLSI Design Laboratory, Department of Electrical and Computer Engineering, University of Patras"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VLSI Design Laboratory, Department of Electrical and Computer Engineering, University of Patras","institution_ids":["https://openalex.org/I174878644"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045307151","display_name":"T. Stouraitis","orcid":"https://orcid.org/0000-0002-3696-4958"},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"T. Stouraitis","raw_affiliation_strings":["VLSI Design Laboratory, Department of Electrical and Computer Engineering, University of Patras"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VLSI Design Laboratory, Department of Electrical and Computer Engineering, University of Patras","institution_ids":["https://openalex.org/I174878644"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5112615786","display_name":"C.E. Goutis","orcid":null},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"C. E. Goutis","raw_affiliation_strings":["VLSI Design Laboratory, Department of Electrical and Computer Engineering, University of Patras"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VLSI Design Laboratory, Department of Electrical and Computer Engineering, University of Patras","institution_ids":["https://openalex.org/I174878644"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5108075591"],"corresponding_institution_ids":["https://openalex.org/I174878644"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":1,"citation_normalized_percentile":{"value":0.14382299,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"10","issue":"2","first_page":"177","last_page":"202"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9937999844551086,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.8803853392601013},{"id":"https://openalex.org/keywords/transformation","display_name":"Transformation (genetics)","score":0.7708167433738708},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6952850818634033},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5611633658409119},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.5562458634376526},{"id":"https://openalex.org/keywords/product","display_name":"Product (mathematics)","score":0.5316323041915894},{"id":"https://openalex.org/keywords/sequence","display_name":"Sequence (biology)","score":0.5118553042411804},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.5041667222976685},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.4885045289993286},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4372102618217468},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.37818121910095215},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1479937732219696},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.14433249831199646}],"concepts":[{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.8803853392601013},{"id":"https://openalex.org/C204241405","wikidata":"https://www.wikidata.org/wiki/Q461499","display_name":"Transformation (genetics)","level":3,"score":0.7708167433738708},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6952850818634033},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5611633658409119},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.5562458634376526},{"id":"https://openalex.org/C90673727","wikidata":"https://www.wikidata.org/wiki/Q901718","display_name":"Product (mathematics)","level":2,"score":0.5316323041915894},{"id":"https://openalex.org/C2778112365","wikidata":"https://www.wikidata.org/wiki/Q3511065","display_name":"Sequence (biology)","level":2,"score":0.5118553042411804},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.5041667222976685},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.4885045289993286},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4372102618217468},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.37818121910095215},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1479937732219696},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.14433249831199646},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C54355233","wikidata":"https://www.wikidata.org/wiki/Q7162","display_name":"Genetics","level":1,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1155/1999/16415","is_oa":true,"landing_page_url":"https://doi.org/10.1155/1999/16415","pdf_url":"https://downloads.hindawi.com/archive/1999/016415.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869","https://openalex.org/P4310320595"],"host_organization_lineage_names":["Hindawi Publishing Corporation","Wiley"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1155/1999/16415","is_oa":true,"landing_page_url":"https://doi.org/10.1155/1999/16415","pdf_url":"https://downloads.hindawi.com/archive/1999/016415.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869","https://openalex.org/P4310320595"],"host_organization_lineage_names":["Hindawi Publishing Corporation","Wiley"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"sustainable_development_goals":[{"score":0.8199999928474426,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2058312941.pdf","grobid_xml":"https://content.openalex.org/works/W2058312941.grobid-xml"},"referenced_works_count":29,"referenced_works":["https://openalex.org/W188547350","https://openalex.org/W1497483492","https://openalex.org/W1539883310","https://openalex.org/W1726015477","https://openalex.org/W1922966128","https://openalex.org/W1974267159","https://openalex.org/W2019558918","https://openalex.org/W2049204312","https://openalex.org/W2058077061","https://openalex.org/W2103244632","https://openalex.org/W2114954167","https://openalex.org/W2117226423","https://openalex.org/W2120090463","https://openalex.org/W2136563048","https://openalex.org/W2141355147","https://openalex.org/W2154325696","https://openalex.org/W2166475245","https://openalex.org/W2168010959","https://openalex.org/W2204421654","https://openalex.org/W2752885492","https://openalex.org/W4214520908","https://openalex.org/W4231066912","https://openalex.org/W4235516985","https://openalex.org/W4242971398","https://openalex.org/W6604762757","https://openalex.org/W6607601658","https://openalex.org/W6640019215","https://openalex.org/W6677016937","https://openalex.org/W6684538193"],"related_works":["https://openalex.org/W2390348052","https://openalex.org/W2065566231","https://openalex.org/W2390600871","https://openalex.org/W2363399630","https://openalex.org/W2074772664","https://openalex.org/W2148867666","https://openalex.org/W1584540853","https://openalex.org/W2379188611","https://openalex.org/W2378332951","https://openalex.org/W1535702119"],"abstract_inverted_index":{"A":[0],"novel":[1],"architectural":[2],"transformation":[3,17,108,133],"for":[4,97,125],"low":[5],"power":[6,76,114,145],"synthesis":[7],"of":[8,21,23,52,56,65,81,92,99],"inner":[9,30,84],"product":[10,85],"computational":[11,67],"structures":[12],"is":[13,46,95,110,119],"presented.":[14],"The":[15,54,101],"proposed":[16,107,132],"reorders":[18],"the":[19,24,29,50,59,63,66,90,106,131],"sequence":[20],"evaluation":[22],"multiply\u2010accumulate":[25],"operations":[26],"that":[27,130],"form":[28],"products.":[31],"Information":[32],"related":[33],"to":[34,48,75,104,135],"both":[35],"coefficients,":[36],"which":[37,43,105],"are":[38,44,87],"statically":[39],"determined,":[40],"and":[41,89,118,142],"data,":[42],"dynamic,":[45],"used":[47],"drive":[49],"reordering":[51,55,94],"computation.":[53],"computation":[57,86,93],"reduces":[58],"switching":[60,140],"activity":[61,141],"at":[62],"inputs":[64],"units":[68],"but":[69],"inside":[70],"them":[71],"as":[72],"well":[73],"leading":[74],"consumption":[77],"reduction.":[78],"Different":[79],"classes":[80],"algorithms":[82,128],"requiring":[83],"identified":[88],"problem":[91],"formulated":[96],"each":[98],"them.":[100],"target":[102],"architecture":[103],"applies":[109],"based":[111],"on":[112],"a":[113],"optimal":[115],"memory":[116],"organization":[117],"described":[120],"in":[121,138,144],"detail.":[122],"Experimental":[123],"results":[124],"several":[126],"DSP":[127],"show":[129],"leads":[134],"significant":[136],"savings":[137],"net":[139],"thus":[143],"consumption.":[146]},"counts_by_year":[],"updated_date":"2026-08-15T07:11:24.734988","created_date":"2025-10-10T00:00:00"}
