{"id":"https://openalex.org/W2005521283","doi":"https://doi.org/10.1155/1998/95421","title":"A High Level Synthesis System for VLSI Image Processing Applications","display_name":"A High Level Synthesis System for VLSI Image Processing Applications","publication_year":1995,"publication_date":"1995-03-10","ids":{"openalex":"https://openalex.org/W2005521283","doi":"https://doi.org/10.1155/1998/95421","mag":"2005521283"},"language":"en","primary_location":{"id":"doi:10.1155/1998/95421","is_oa":true,"landing_page_url":"https://doi.org/10.1155/1998/95421","pdf_url":"https://downloads.hindawi.com/archive/1998/095421.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://downloads.hindawi.com/archive/1998/095421.pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5112472558","display_name":"Fran\u00e7ois S. Verdier","orcid":null},"institutions":[{"id":"https://openalex.org/I4210142635","display_name":"PATH To Reading","ror":"https://ror.org/0482xmh13","country_code":"US","type":"other","lineage":["https://openalex.org/I4210142635"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Fran\u00e7ois S. Verdier","raw_affiliation_strings":["ETCA Syst\u00e8me de Perception Laboratory, 16 bis Avenue Prieur de la C\u00f4te d\u2019Or, Arceuil, F-94114","ETCA Syst\u00e8me de Perception Laboratory, 16 bis Avenue Prieur de la C\u00f4te d'Or, Arceuil, F-94114"],"affiliations":[{"raw_affiliation_string":"ETCA Syst\u00e8me de Perception Laboratory, 16 bis Avenue Prieur de la C\u00f4te d\u2019Or, Arceuil, F-94114","institution_ids":["https://openalex.org/I4210142635"]},{"raw_affiliation_string":"ETCA Syst\u00e8me de Perception Laboratory, 16 bis Avenue Prieur de la C\u00f4te d'Or, Arceuil, F-94114","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5024071269","display_name":"Bertrand Zavidovique","orcid":null},"institutions":[{"id":"https://openalex.org/I4210096842","display_name":"Fondation FondaMental","ror":"https://ror.org/00rrhf939","country_code":"FR","type":"other","lineage":["https://openalex.org/I4210096842"]},{"id":"https://openalex.org/I102197404","display_name":"Universit\u00e9 Paris-Sud","ror":"https://ror.org/028rypz17","country_code":"FR","type":"education","lineage":["https://openalex.org/I102197404"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Bertrand Zavidovique","raw_affiliation_strings":["lnstitut d\u2019Electronique Fondamentale, University of Paris-XI, Orsay, F-91405","lnstitut d'Electronique Fondamentale, University of Paris-XI, Orsay, F-91405"],"affiliations":[{"raw_affiliation_string":"lnstitut d\u2019Electronique Fondamentale, University of Paris-XI, Orsay, F-91405","institution_ids":["https://openalex.org/I4210096842"]},{"raw_affiliation_string":"lnstitut d'Electronique Fondamentale, University of Paris-XI, Orsay, F-91405","institution_ids":["https://openalex.org/I102197404"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5112472558"],"corresponding_institution_ids":["https://openalex.org/I4210142635"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":3,"citation_normalized_percentile":{"value":0.11832816,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"7","issue":"4","first_page":"321","last_page":"336"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9894000291824341,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10531","display_name":"Advanced Vision and Imaging","score":0.9794999957084656,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.7610604763031006},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.643860399723053},{"id":"https://openalex.org/keywords/image-processing","display_name":"Image processing","score":0.48516494035720825},{"id":"https://openalex.org/keywords/image","display_name":"Image (mathematics)","score":0.48343929648399353},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.47891318798065186},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.4256075620651245},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.3411772549152374},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.32337114214897156},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.056751519441604614}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.7610604763031006},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.643860399723053},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.48516494035720825},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.48343929648399353},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.47891318798065186},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.4256075620651245},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.3411772549152374},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.32337114214897156},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.056751519441604614}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1155/1998/95421","is_oa":true,"landing_page_url":"https://doi.org/10.1155/1998/95421","pdf_url":"https://downloads.hindawi.com/archive/1998/095421.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1155/1998/95421","is_oa":true,"landing_page_url":"https://doi.org/10.1155/1998/95421","pdf_url":"https://downloads.hindawi.com/archive/1998/095421.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.46000000834465027,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2005521283.pdf","grobid_xml":"https://content.openalex.org/works/W2005521283.grobid-xml"},"referenced_works_count":18,"referenced_works":["https://openalex.org/W321648571","https://openalex.org/W2002076172","https://openalex.org/W2066148419","https://openalex.org/W2080026270","https://openalex.org/W2118584505","https://openalex.org/W2132173136","https://openalex.org/W2136241326","https://openalex.org/W2171776966","https://openalex.org/W3103587258","https://openalex.org/W4230627876","https://openalex.org/W4233206289","https://openalex.org/W4236173078","https://openalex.org/W4242025086","https://openalex.org/W4254786794","https://openalex.org/W4256675088","https://openalex.org/W4301382249","https://openalex.org/W6608159510","https://openalex.org/W6673353670"],"related_works":["https://openalex.org/W2134640991","https://openalex.org/W3027318491","https://openalex.org/W101478184","https://openalex.org/W1986774039","https://openalex.org/W2135482679","https://openalex.org/W2035070505","https://openalex.org/W1973862904","https://openalex.org/W181593118","https://openalex.org/W2296236528","https://openalex.org/W1966826470"],"abstract_inverted_index":{"We":[0],"present":[1],"a":[2,17,35,114],"VLSI":[3],"synthesis":[4,63,72],"environment":[5,15,112],"dedicated":[6],"to":[7,92],"the":[8,24,27,39,47,81,85,88,94,100],"design":[9,40],"of":[10,23,50,80,87,99],"image":[11],"processing":[12],"architectures.":[13],"The":[14,32],"includes":[16],"\u201cfront\u2010end\u201d":[18],"data\u2010flow":[19,89],"emulator":[20],"for":[21,61,70],"validation":[22],"algorithms":[25,57],"and":[26,42,65,68,73],"RTL\u2010synthesis":[28],"system":[29],"called":[30],"ALPHA.":[31],"latter":[33],"implements":[34],"stochastic":[36],"search":[37],"in":[38,59,97],"space":[41],"produces":[43],"efficient":[44],"solutions":[45],"considering":[46],"\u201crestricted\u201d":[48],"domain":[49],"concerned":[51],"applications.":[52],"Two":[53],"simulated":[54],"Annealing":[55],"(SA)":[56],"run":[58],"sequence":[60],"data\u2010path":[62,74],"(scheduling":[64],"module":[66],"selection)":[67],"then":[69],"control":[71,95],"completion":[75],"(binding).":[76],"An":[77],"interesting":[78],"feature":[79],"first":[82],"optimization":[83],"is":[84],"use":[86],"graph":[90],"regularity":[91],"predict":[93],"influence":[96],"terms":[98],"future":[101],"design.":[102],"A":[103],"few":[104],"designs":[105],"have":[106],"already":[107],"been":[108],"compiled":[109],"under":[110],"this":[111],"including":[113],"default":[115],"detector":[116],"presented":[117],"here.":[118]},"counts_by_year":[{"year":2023,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}