{"id":"https://openalex.org/W1984768287","doi":"https://doi.org/10.1155/1998/83615","title":"Realistic Fault Modeling and Extraction of Multiple Bridging and Break Faults","display_name":"Realistic Fault Modeling and Extraction of Multiple Bridging and Break Faults","publication_year":1998,"publication_date":"1998-01-01","ids":{"openalex":"https://openalex.org/W1984768287","doi":"https://doi.org/10.1155/1998/83615","mag":"1984768287"},"language":"en","primary_location":{"id":"doi:10.1155/1998/83615","is_oa":true,"landing_page_url":"https://doi.org/10.1155/1998/83615","pdf_url":"https://downloads.hindawi.com/archive/1998/083615.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://downloads.hindawi.com/archive/1998/083615.pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5029698258","display_name":"Gerald Spiegel","orcid":null},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Gerald Spiegel","raw_affiliation_strings":["Institute of Computer Design and Fault Tolerance (Prof. Dr.-Ing. D. Schmid), University of Karlsruhe"],"affiliations":[{"raw_affiliation_string":"Institute of Computer Design and Fault Tolerance (Prof. Dr.-Ing. D. Schmid), University of Karlsruhe","institution_ids":["https://openalex.org/I102335020"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5020277419","display_name":"A.P. Stroele","orcid":null},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Albrecht P. Stroele","raw_affiliation_strings":["Institute of Computer Design and Fault Tolerance (Prof. Dr.-Ing. D. Schmid), University of Karlsruhe"],"affiliations":[{"raw_affiliation_string":"Institute of Computer Design and Fault Tolerance (Prof. Dr.-Ing. D. Schmid), University of Karlsruhe","institution_ids":["https://openalex.org/I102335020"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5029698258"],"corresponding_institution_ids":["https://openalex.org/I102335020"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":1,"citation_normalized_percentile":{"value":0.10827858,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"7","issue":"2","first_page":"163","last_page":"176"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/bridging","display_name":"Bridging (networking)","score":0.91397625207901},{"id":"https://openalex.org/keywords/fault-model","display_name":"Fault model","score":0.554772675037384},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.5013713836669922},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4955326318740845},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.4867551326751709},{"id":"https://openalex.org/keywords/stuck-at-fault","display_name":"Stuck-at fault","score":0.43799251317977905},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4180383086204529},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.3733747601509094},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3375794291496277},{"id":"https://openalex.org/keywords/data-mining","display_name":"Data mining","score":0.33345067501068115},{"id":"https://openalex.org/keywords/fault-detection-and-isolation","display_name":"Fault detection and isolation","score":0.22310522198677063},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.1906198263168335},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.08455333113670349},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.07659295201301575},{"id":"https://openalex.org/keywords/geology","display_name":"Geology","score":0.06227341294288635}],"concepts":[{"id":"https://openalex.org/C174348530","wikidata":"https://www.wikidata.org/wiki/Q188635","display_name":"Bridging (networking)","level":2,"score":0.91397625207901},{"id":"https://openalex.org/C167391956","wikidata":"https://www.wikidata.org/wiki/Q1401211","display_name":"Fault model","level":3,"score":0.554772675037384},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.5013713836669922},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4955326318740845},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.4867551326751709},{"id":"https://openalex.org/C13625343","wikidata":"https://www.wikidata.org/wiki/Q7627418","display_name":"Stuck-at fault","level":4,"score":0.43799251317977905},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4180383086204529},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.3733747601509094},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3375794291496277},{"id":"https://openalex.org/C124101348","wikidata":"https://www.wikidata.org/wiki/Q172491","display_name":"Data mining","level":1,"score":0.33345067501068115},{"id":"https://openalex.org/C152745839","wikidata":"https://www.wikidata.org/wiki/Q5438153","display_name":"Fault detection and isolation","level":3,"score":0.22310522198677063},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.1906198263168335},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.08455333113670349},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.07659295201301575},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.06227341294288635},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0},{"id":"https://openalex.org/C172707124","wikidata":"https://www.wikidata.org/wiki/Q423488","display_name":"Actuator","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1155/1998/83615","is_oa":true,"landing_page_url":"https://doi.org/10.1155/1998/83615","pdf_url":"https://downloads.hindawi.com/archive/1998/083615.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1155/1998/83615","is_oa":true,"landing_page_url":"https://doi.org/10.1155/1998/83615","pdf_url":"https://downloads.hindawi.com/archive/1998/083615.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W1984768287.pdf","grobid_xml":"https://content.openalex.org/works/W1984768287.grobid-xml"},"referenced_works_count":32,"referenced_works":["https://openalex.org/W90616432","https://openalex.org/W1503965036","https://openalex.org/W1896671528","https://openalex.org/W1985413892","https://openalex.org/W2002330922","https://openalex.org/W2014719900","https://openalex.org/W2033724727","https://openalex.org/W2041090186","https://openalex.org/W2098112833","https://openalex.org/W2100751470","https://openalex.org/W2102673603","https://openalex.org/W2110169477","https://openalex.org/W2129555080","https://openalex.org/W2130300051","https://openalex.org/W2136603243","https://openalex.org/W2137128459","https://openalex.org/W2138223068","https://openalex.org/W2152125778","https://openalex.org/W2154418718","https://openalex.org/W2157211828","https://openalex.org/W2164185837","https://openalex.org/W2165672048","https://openalex.org/W2539235335","https://openalex.org/W4230124595","https://openalex.org/W4254092942","https://openalex.org/W6639512026","https://openalex.org/W6654191946","https://openalex.org/W6674041107","https://openalex.org/W6674485376","https://openalex.org/W6679603411","https://openalex.org/W6729108271","https://openalex.org/W6996820255"],"related_works":["https://openalex.org/W2051500795","https://openalex.org/W3148663848","https://openalex.org/W1987791642","https://openalex.org/W1986800855","https://openalex.org/W2024194466","https://openalex.org/W2278517150","https://openalex.org/W2166897423","https://openalex.org/W4256030018","https://openalex.org/W3150960233","https://openalex.org/W2383699822"],"abstract_inverted_index":{"Fault":[0],"sets":[1],"that":[2,34,44,52,98],"accurately":[3],"describe":[4],"physical":[5],"failures":[6],"are":[7],"required":[8],"for":[9,82,107],"efficient":[10],"pattern":[11],"generation":[12],"and":[13,61,81,114],"fault":[14,18,84],"coverage":[15],"evaluation.":[16],"The":[17,64,90],"model":[19],"presented":[20],"in":[21,29],"this":[22],"paper":[23],"uniquely":[24],"describes":[25],"all":[26,112],"structural":[27],"changes":[28],"the":[30,69,76,86,94],"transistor":[31],"net":[32,55],"list":[33],"can":[35],"be":[36,116],"caused":[37],"by":[38,93],"spot":[39],"defects,":[40],"including":[41],"bridging":[42,99],"faults":[43,51,74,100,113],"connect":[45],"more":[46,57,102],"than":[47,58,103],"two":[48,59,104],"nets,":[49],"break":[50,53],"a":[54,108],"into":[56],"parts,":[60],"compound":[62],"faults.":[63],"developed":[65],"analysis":[66],"method":[67],"extracts":[68],"comprehensive":[70],"set":[71],"of":[72,78,88,111],"realistic":[73],"from":[75],"layout":[77],"CMOS":[79],"ICs":[80],"each":[83],"computes":[85],"probability":[87],"occurrence.":[89],"results":[91],"obtained":[92],"tool":[95],"REFLEX":[96],"show":[97],"connecting":[101],"nets":[105],"account":[106],"significant":[109],"portion":[110],"cannot":[115],"neglected.":[117]},"counts_by_year":[{"year":2019,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
