{"id":"https://openalex.org/W2081601345","doi":"https://doi.org/10.1155/1998/46819","title":"Statistical Estimation of the ,Switching Activity in VLSI Circuits","display_name":"Statistical Estimation of the ,Switching Activity in VLSI Circuits","publication_year":1998,"publication_date":"1998-01-01","ids":{"openalex":"https://openalex.org/W2081601345","doi":"https://doi.org/10.1155/1998/46819","mag":"2081601345"},"language":"en","primary_location":{"id":"doi:10.1155/1998/46819","is_oa":true,"landing_page_url":"https://doi.org/10.1155/1998/46819","pdf_url":"https://downloads.hindawi.com/archive/1998/046819.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://downloads.hindawi.com/archive/1998/046819.pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5089881278","display_name":"Farid N. Najm","orcid":"https://orcid.org/0000-0001-5393-7794"},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Farid N. Najm","raw_affiliation_strings":["Coordinated Science Lab. and ECE Dept., University of Illinois at Urbana-Champaign, Urbana, Illinois 61801, USA"],"affiliations":[{"raw_affiliation_string":"Coordinated Science Lab. and ECE Dept., University of Illinois at Urbana-Champaign, Urbana, Illinois 61801, USA","institution_ids":["https://openalex.org/I157725225"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5082642115","display_name":"Michael G. Xakellis","orcid":null},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Michael G. Xakellis","raw_affiliation_strings":["Coordinated Science Lab. and ECE Dept., University of Illinois at Urbana-Champaign, Urbana, Illinois 61801, USA"],"affiliations":[{"raw_affiliation_string":"Coordinated Science Lab. and ECE Dept., University of Illinois at Urbana-Champaign, Urbana, Illinois 61801, USA","institution_ids":["https://openalex.org/I157725225"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5089881278"],"corresponding_institution_ids":["https://openalex.org/I157725225"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":16,"citation_normalized_percentile":{"value":0.16364971,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"7","issue":"3","first_page":"243","last_page":"254"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.7720869183540344},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5332543253898621},{"id":"https://openalex.org/keywords/estimation","display_name":"Estimation","score":0.5249065160751343},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5038926005363464},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.49675804376602173},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19831162691116333},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.17728683352470398},{"id":"https://openalex.org/keywords/systems-engineering","display_name":"Systems engineering","score":0.07651969790458679}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.7720869183540344},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5332543253898621},{"id":"https://openalex.org/C96250715","wikidata":"https://www.wikidata.org/wiki/Q965330","display_name":"Estimation","level":2,"score":0.5249065160751343},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5038926005363464},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.49675804376602173},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19831162691116333},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.17728683352470398},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.07651969790458679}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1155/1998/46819","is_oa":true,"landing_page_url":"https://doi.org/10.1155/1998/46819","pdf_url":"https://downloads.hindawi.com/archive/1998/046819.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.39.8992","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.39.8992","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.eecg.toronto.edu/~najm/papers/vlsidesign96-med.ps","raw_type":"text"}],"best_oa_location":{"id":"doi:10.1155/1998/46819","is_oa":true,"landing_page_url":"https://doi.org/10.1155/1998/46819","pdf_url":"https://downloads.hindawi.com/archive/1998/046819.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G4647529120","display_name":null,"funder_award_id":"MIP-9308426","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G5808779405","display_name":"RIA: Synthesis of Reliable and Low-Power VLSI               Circuits","funder_award_id":"9308426","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2081601345.pdf","grobid_xml":"https://content.openalex.org/works/W2081601345.grobid-xml"},"referenced_works_count":8,"referenced_works":["https://openalex.org/W1667165204","https://openalex.org/W2079305280","https://openalex.org/W2102666576","https://openalex.org/W2137917061","https://openalex.org/W2152406824","https://openalex.org/W4232277272","https://openalex.org/W4300878842","https://openalex.org/W6679090577"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2748952813","https://openalex.org/W4283025278","https://openalex.org/W2390279801","https://openalex.org/W61292821","https://openalex.org/W2358668433","https://openalex.org/W2082432309","https://openalex.org/W817174743","https://openalex.org/W4396701345","https://openalex.org/W4241196849"],"abstract_inverted_index":{"Higher":[0],"levels":[1],"of":[2,9,26,35,42,53,83,106],"integration":[3],"have":[4,156],"led":[5],"to":[6,32,71,152],"a":[7,47,51,67],"generation":[8],"integrated":[10],"circuits":[11],"for":[12],"which":[13,149],"power":[14,153],"dissipation":[15,154],"and":[16,91,112,123,155],"reliability":[17,158],"are":[18,29,117,128],"major":[19],"design":[20],"concerns.":[21],"In":[22],"CMOS":[23],"circuits,":[24],"both":[25],"these":[27],"problems":[28],"directly":[30],"related":[31],"the":[33,60,88,98,104,136],"extent":[34],"circuit":[36,48],"switching":[37,54],"activity.":[38],"The":[39,81],"average":[40],"number":[41],"transitions":[43],"per":[44],"second":[45],"at":[46],"node":[49,74],"is":[50,86,103],"measure":[52],"activity":[55],"that":[56,87],"has":[57],"been":[58],"called":[59],"transition":[61,75],"density":[62],".":[63],"This":[64,139],"paper":[65],"presents":[66],"statistical":[68],"simulation":[69],"technique":[70],"estimate":[72],"individual":[73],"densities":[76],"in":[77],"combinational":[78],"logic":[79],"circuits.":[80],"strength":[82],"this":[84],"approach":[85],"desired":[89],"accuracy":[90,145],"confidence":[92,124],"can":[93],"be":[94],"specified":[95],"up\u2010front":[96],"by":[97],"user.":[99],"Another":[100],"key":[101],"feature":[102],"classification":[105],"nodes":[107,116,127,148],"into":[108],"two":[109],"categories:":[110],"regular\u2010":[111],"low\u2010density":[113],"nodes.":[114],"Regular\u2010density":[115],"certified":[118,129],"with":[119,130,135],"user\u2010specified":[120],"percentage":[121,144],"error":[122,133],"levels.":[125],"Low\u2010density":[126],"an":[131],"absolute":[132],",":[134],"same":[137],"confidence.":[138],"speeds":[140],"convergence":[141],"while":[142],"sacrificing":[143],"only":[146],"on":[147],"contribute":[150],"little":[151],"few":[157],"problems.":[159]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2016,"cited_by_count":2},{"year":2014,"cited_by_count":1}],"updated_date":"2026-04-21T08:09:41.155169","created_date":"2025-10-10T00:00:00"}