{"id":"https://openalex.org/W2138689980","doi":"https://doi.org/10.1155/1996/25839","title":"A Novel Path Delay Fault Simulator Using Binary Logic","display_name":"A Novel Path Delay Fault Simulator Using Binary Logic","publication_year":1996,"publication_date":"1996-01-01","ids":{"openalex":"https://openalex.org/W2138689980","doi":"https://doi.org/10.1155/1996/25839","mag":"2138689980"},"language":"en","primary_location":{"id":"doi:10.1155/1996/25839","is_oa":true,"landing_page_url":"https://doi.org/10.1155/1996/25839","pdf_url":"https://downloads.hindawi.com/archive/1996/025839.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://downloads.hindawi.com/archive/1996/025839.pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5113662264","display_name":"Ananta K. Majhi","orcid":null},"institutions":[{"id":"https://openalex.org/I59270414","display_name":"Indian Institute of Science Bangalore","ror":"https://ror.org/04dese585","country_code":"IN","type":"education","lineage":["https://openalex.org/I59270414"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Ananta K. Majhi","raw_affiliation_strings":["Department of ECE, Indian Institute of Science, Bangalore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of ECE, Indian Institute of Science, Bangalore","institution_ids":["https://openalex.org/I59270414"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108471229","display_name":"James Jacob","orcid":null},"institutions":[{"id":"https://openalex.org/I59270414","display_name":"Indian Institute of Science Bangalore","ror":"https://ror.org/04dese585","country_code":"IN","type":"education","lineage":["https://openalex.org/I59270414"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"James Jacob","raw_affiliation_strings":["Department of ECE, Indian Institute of Science, Bangalore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of ECE, Indian Institute of Science, Bangalore","institution_ids":["https://openalex.org/I59270414"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5067392303","display_name":"L.M. Patnaik","orcid":"https://orcid.org/0000-0001-9725-2535"},"institutions":[{"id":"https://openalex.org/I59270414","display_name":"Indian Institute of Science Bangalore","ror":"https://ror.org/04dese585","country_code":"IN","type":"education","lineage":["https://openalex.org/I59270414"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Lalit M. Patnaik","raw_affiliation_strings":["Microprocessor Applications Laboratory, Indian Institute of Science, Bangalore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microprocessor Applications Laboratory, Indian Institute of Science, Bangalore","institution_ids":["https://openalex.org/I59270414"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5067392303"],"corresponding_institution_ids":["https://openalex.org/I59270414"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":3,"citation_normalized_percentile":{"value":0.19493226,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"4","issue":"3","first_page":"167","last_page":"179"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9958000183105469,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.7650150060653687},{"id":"https://openalex.org/keywords/fault-simulator","display_name":"Fault Simulator","score":0.7384558320045471},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.6494314074516296},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.6222770810127258},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.6176520586013794},{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.581824779510498},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.5209264159202576},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.4974267780780792},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.46929556131362915},{"id":"https://openalex.org/keywords/logic-simulation","display_name":"Logic simulation","score":0.4229193329811096},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4204501807689667},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.41695988178253174},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.37333840131759644},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.353241890668869},{"id":"https://openalex.org/keywords/fault-detection-and-isolation","display_name":"Fault detection and isolation","score":0.2413952350616455},{"id":"https://openalex.org/keywords/stuck-at-fault","display_name":"Stuck-at fault","score":0.19599485397338867},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.14152640104293823},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12293043732643127},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.12115851044654846}],"concepts":[{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.7650150060653687},{"id":"https://openalex.org/C2776365744","wikidata":"https://www.wikidata.org/wiki/Q5438149","display_name":"Fault Simulator","level":5,"score":0.7384558320045471},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.6494314074516296},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.6222770810127258},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.6176520586013794},{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.581824779510498},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.5209264159202576},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.4974267780780792},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.46929556131362915},{"id":"https://openalex.org/C64859876","wikidata":"https://www.wikidata.org/wiki/Q173673","display_name":"Logic simulation","level":3,"score":0.4229193329811096},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4204501807689667},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.41695988178253174},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.37333840131759644},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.353241890668869},{"id":"https://openalex.org/C152745839","wikidata":"https://www.wikidata.org/wiki/Q5438153","display_name":"Fault detection and isolation","level":3,"score":0.2413952350616455},{"id":"https://openalex.org/C13625343","wikidata":"https://www.wikidata.org/wiki/Q7627418","display_name":"Stuck-at fault","level":4,"score":0.19599485397338867},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.14152640104293823},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12293043732643127},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.12115851044654846},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C172707124","wikidata":"https://www.wikidata.org/wiki/Q423488","display_name":"Actuator","level":2,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1155/1996/25839","is_oa":true,"landing_page_url":"https://doi.org/10.1155/1996/25839","pdf_url":"https://downloads.hindawi.com/archive/1996/025839.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},{"id":"pmh:oai:eprints.iisc.ac.in:10747","is_oa":false,"landing_page_url":null,"pdf_url":null,"source":{"id":"https://openalex.org/S4377196309","display_name":"NOT FOUND REPOSITORY (Indian Institute of Science Bangalore)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I59270414","host_organization_name":"Indian Institute of Science Bangalore","host_organization_lineage":["https://openalex.org/I59270414"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"acceptedVersion","is_accepted":true,"is_published":false,"raw_source_name":"","raw_type":"Journal Article"}],"best_oa_location":{"id":"doi:10.1155/1996/25839","is_oa":true,"landing_page_url":"https://doi.org/10.1155/1996/25839","pdf_url":"https://downloads.hindawi.com/archive/1996/025839.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320307762","display_name":"International Business Machines Corporation","ror":"https://ror.org/05hh8d621"}],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2138689980.pdf","grobid_xml":"https://content.openalex.org/works/W2138689980.grobid-xml"},"referenced_works_count":18,"referenced_works":["https://openalex.org/W1913241451","https://openalex.org/W2005319125","https://openalex.org/W2047357356","https://openalex.org/W2061946964","https://openalex.org/W2107995582","https://openalex.org/W2110134350","https://openalex.org/W2110948310","https://openalex.org/W2112192542","https://openalex.org/W2119130057","https://openalex.org/W2123196520","https://openalex.org/W2124196450","https://openalex.org/W2142063621","https://openalex.org/W2149991436","https://openalex.org/W2158586221","https://openalex.org/W4241623469","https://openalex.org/W4252337063","https://openalex.org/W6666103859","https://openalex.org/W6676619887"],"related_works":["https://openalex.org/W2085176210","https://openalex.org/W2169337913","https://openalex.org/W2885828488","https://openalex.org/W4251740953","https://openalex.org/W2089121515","https://openalex.org/W3114476551","https://openalex.org/W1548754060","https://openalex.org/W2150621458","https://openalex.org/W2162747415","https://openalex.org/W2536207846"],"abstract_inverted_index":{"A":[0,56],"novel":[1],"path":[2],"delay":[3],"fault":[4],"simulator":[5],"for":[6,27],"combinational":[7],"logic":[8,32,37],"circuits":[9,117],"which":[10,44,63,104],"is":[11,20],"capable":[12],"of":[13,30,49,53,108,121],"detecting":[14],"both":[15],"robust":[16,66],"and":[17,67,95],"nonrobust":[18,68,109],"paths":[19,69],"presented.":[21],"Particular":[22],"emphasis":[23],"has":[24,60],"been":[25,61],"given":[26,90],"the":[28,35,41,47,50,54,79,102,106,119,122],"use":[29],"binary":[31],"rather":[33],"than":[34],"multiple\u2010valued":[36],"as":[38],"used":[39],"in":[40,83],"existing":[42],"simulators":[43],"contributes":[45],"to":[46,81,91,96],"reduction":[48],"overall":[51],"complexity":[52],"algorithm.":[55,123],"rule":[57],"based":[58],"approach":[59],"developed":[62],"identifies":[64],"all":[65],"tested":[70],"by":[71],"a":[72,84],"two\u2010pattern":[73],"test":[74],"<V1,V2>,":[75],"while":[76],"backtracing":[77],"from":[78],"POs":[80],"PIs":[82],"depth\u2010first":[85],"manner.":[86],"Rules":[87],"are":[88],"also":[89],"find":[92],"probable":[93],"glitches":[94],"determine":[97],"how":[98],"they":[99],"propagate":[100],"through":[101],"circuit,":[103],"enables":[105],"identification":[107],"paths.":[110],"Experimental":[111],"results":[112],"on":[113],"several":[114],"ISCAS\u203285":[115],"benchmark":[116],"demonstrate":[118],"efficiency":[120]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}