{"id":"https://openalex.org/W2069533828","doi":"https://doi.org/10.1155/1995/67208","title":"A General Approach to Boolean FunctionDecomposition and its Application in FPGABasedSynthesis","display_name":"A General Approach to Boolean FunctionDecomposition and its Application in FPGABasedSynthesis","publication_year":1995,"publication_date":"1995-01-01","ids":{"openalex":"https://openalex.org/W2069533828","doi":"https://doi.org/10.1155/1995/67208","mag":"2069533828"},"language":"en","primary_location":{"id":"doi:10.1155/1995/67208","is_oa":true,"landing_page_url":"https://doi.org/10.1155/1995/67208","pdf_url":"https://downloads.hindawi.com/archive/1995/067208.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://downloads.hindawi.com/archive/1995/067208.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5051919904","display_name":"Tadeusz \u0141uba","orcid":"https://orcid.org/0000-0002-4965-7842"},"institutions":[{"id":"https://openalex.org/I108403487","display_name":"Warsaw University of Technology","ror":"https://ror.org/00y0xnp53","country_code":"PL","type":"education","lineage":["https://openalex.org/I108403487"]}],"countries":["PL"],"is_corresponding":true,"raw_author_name":"Tadeusz \u0141uba","raw_affiliation_strings":["Warsaw University of Technology, Institute of Telecommunications, Nowowiejska 15/19"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Warsaw University of Technology, Institute of Telecommunications, Nowowiejska 15/19","institution_ids":["https://openalex.org/I108403487"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110768932","display_name":"Henry Selvaraj","orcid":"https://orcid.org/0000-0001-6166-3826"},"institutions":[{"id":"https://openalex.org/I108403487","display_name":"Warsaw University of Technology","ror":"https://ror.org/00y0xnp53","country_code":"PL","type":"education","lineage":["https://openalex.org/I108403487"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"Henry Selvaraj","raw_affiliation_strings":["Warsaw University of Technology, Institute of Telecommunications, Nowowiejska 15/19, 00-665 Warsaw, Poland","Warsaw University of Technology, Institute of Telecommunications, Nowowiejska 15/19"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Warsaw University of Technology, Institute of Telecommunications, Nowowiejska 15/19, 00-665 Warsaw, Poland","institution_ids":["https://openalex.org/I108403487"]},{"raw_affiliation_string":"Warsaw University of Technology, Institute of Telecommunications, Nowowiejska 15/19","institution_ids":["https://openalex.org/I108403487"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5051919904"],"corresponding_institution_ids":["https://openalex.org/I108403487"],"apc_list":null,"apc_paid":null,"fwci":3.2029,"has_fulltext":true,"cited_by_count":70,"citation_normalized_percentile":{"value":0.91858679,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"3","issue":"3-4","first_page":"289","last_page":"300"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9890999794006348,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9890999794006348,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9840999841690063,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12029","display_name":"DNA and Biological Computing","score":0.9822999835014343,"subfield":{"id":"https://openalex.org/subfields/1312","display_name":"Molecular Biology"},"field":{"id":"https://openalex.org/fields/13","display_name":"Biochemistry, Genetics and Molecular Biology"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5654824376106262},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.40201079845428467}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5654824376106262},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.40201079845428467}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1155/1995/67208","is_oa":true,"landing_page_url":"https://doi.org/10.1155/1995/67208","pdf_url":"https://downloads.hindawi.com/archive/1995/067208.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},{"id":"pmh:oai:digitalscholarship.unlv.edu:ece_fac_articles-1303","is_oa":true,"landing_page_url":"https://digitalscholarship.unlv.edu/ece_fac_articles/301","pdf_url":null,"source":{"id":"https://openalex.org/S4377196371","display_name":"Digital Scholarship - UNLV (University of Nevada Reno)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I134113660","host_organization_name":"University of Nevada, Reno","host_organization_lineage":["https://openalex.org/I134113660"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-sa","license_id":"https://openalex.org/licenses/cc-by-nc-sa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Electrical and Computer Engineering Faculty Publications","raw_type":"text"}],"best_oa_location":{"id":"doi:10.1155/1995/67208","is_oa":true,"landing_page_url":"https://doi.org/10.1155/1995/67208","pdf_url":"https://downloads.hindawi.com/archive/1995/067208.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2069533828.pdf","grobid_xml":"https://content.openalex.org/works/W2069533828.grobid-xml"},"referenced_works_count":27,"referenced_works":["https://openalex.org/W350655206","https://openalex.org/W1546297343","https://openalex.org/W1557923305","https://openalex.org/W1582539735","https://openalex.org/W1597088765","https://openalex.org/W1818633441","https://openalex.org/W2012170251","https://openalex.org/W2017522849","https://openalex.org/W2093176534","https://openalex.org/W2118485955","https://openalex.org/W2135534764","https://openalex.org/W2138447154","https://openalex.org/W2140727935","https://openalex.org/W2160445406","https://openalex.org/W2167328871","https://openalex.org/W2170003961","https://openalex.org/W2182401491","https://openalex.org/W2317462728","https://openalex.org/W2323419649","https://openalex.org/W3152180380","https://openalex.org/W4233840884","https://openalex.org/W4234601000","https://openalex.org/W4250347167","https://openalex.org/W6635993368","https://openalex.org/W6680353278","https://openalex.org/W6682306717","https://openalex.org/W6829584414"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2899084033","https://openalex.org/W2748952813","https://openalex.org/W2390279801","https://openalex.org/W4391913857","https://openalex.org/W2358668433","https://openalex.org/W4396701345","https://openalex.org/W2376932109","https://openalex.org/W2001405890","https://openalex.org/W4396696052"],"abstract_inverted_index":{"An":[0],"effective":[1],"logic":[2],"synthesis":[3],"procedure":[4,72],"based":[5,34],"on":[6,35],"parallel":[7],"and":[8,58,85,96],"serial":[9,57],"decomposition":[10,54],"of":[11,29,39,45,50,91,101,118],"a":[12,43,64],"Boolean":[13],"function":[14,41],"is":[15,33,86],"presented":[16,71,105],"in":[17,106,111,127],"this":[18],"paper.":[19],"The":[20,70,99],"decomposition,":[21],"carried":[22],"out":[23],"as":[24],"the":[25,30,40,48,67,102,107,124,128],"very":[26],"first":[27],"step":[28],".synthesis":[31],"process,":[32],"an":[36],"original":[37],"representation":[38],"by":[42,62],"set":[44,49],"r\u2010partitions":[46],"over":[47],"minterms.":[51],"Two":[52],"different":[53,89],"strategies,":[55],"namely":[56],"parallel,":[59],"are":[60],"exploited":[61],"striking":[63],"balance":[65],"between":[66],"two":[68],"ideas.":[69],"can":[73],"be":[74],"applied":[75],"to":[76,123],"completely":[77],"or":[78,82],"incompletely":[79],"specified,":[80],"single\u2010":[81],"multiple\u2010output":[83],"functions":[84],"suitable":[87],"for":[88],"types":[90],"FPGAs":[92],"including":[93],"XILINX,":[94],"ACTEL":[95],"ALGOTRONIX":[97],"devices.":[98],"results":[100],"benchmark":[103],"experiments":[104],"paper":[108],"show":[109],"that,":[110],"several":[112],"cases,":[113],"our":[114],"method":[115],"produces":[116],"circuits":[117],"significantly":[119],"reduced":[120],"complexity":[121],"compared":[122],"solutions":[125],"reported":[126],"literature.":[129]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":4},{"year":2014,"cited_by_count":3},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":3}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}
