{"id":"https://openalex.org/W2104225484","doi":"https://doi.org/10.1155/1995/28167","title":"PARTIF: Interactive System\u2010level Partitioning","display_name":"PARTIF: Interactive System\u2010level Partitioning","publication_year":1995,"publication_date":"1995-01-01","ids":{"openalex":"https://openalex.org/W2104225484","doi":"https://doi.org/10.1155/1995/28167","mag":"2104225484"},"language":"en","primary_location":{"id":"doi:10.1155/1995/28167","is_oa":true,"landing_page_url":"http://doi.org/10.1155/1995/28167","pdf_url":"https://downloads.hindawi.com/archive/1995/028167.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://downloads.hindawi.com/archive/1995/028167.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5004197780","display_name":"T. Ben Ismail","orcid":null},"institutions":[{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Tarek Ben Ismail","raw_affiliation_strings":["System-level Synthesis Group, TIMA/INPG, 46 Av. F\u00e9lix Viallet"],"affiliations":[{"raw_affiliation_string":"System-level Synthesis Group, TIMA/INPG, 46 Av. F\u00e9lix Viallet","institution_ids":["https://openalex.org/I4210087012"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110091665","display_name":"Kevin O\u2019Brien","orcid":null},"institutions":[{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Kevin O\u2032Brien","raw_affiliation_strings":["System-level Synthesis Group, TIMA/INPG, 46 Av. F\u00e9lix Viallet"],"affiliations":[{"raw_affiliation_string":"System-level Synthesis Group, TIMA/INPG, 46 Av. F\u00e9lix Viallet","institution_ids":["https://openalex.org/I4210087012"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5113780350","display_name":"Ahmed Jerraya","orcid":null},"institutions":[{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Ahmed Jerraya","raw_affiliation_strings":["System-level Synthesis Group, TIMA/INPG, 46 Av. F\u00e9lix Viallet"],"affiliations":[{"raw_affiliation_string":"System-level Synthesis Group, TIMA/INPG, 46 Av. F\u00e9lix Viallet","institution_ids":["https://openalex.org/I4210087012"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5004197780"],"corresponding_institution_ids":["https://openalex.org/I4210087012"],"apc_list":null,"apc_paid":null,"fwci":2.0116,"has_fulltext":true,"cited_by_count":8,"citation_normalized_percentile":{"value":0.8751765,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"3","issue":"3-4","first_page":"333","last_page":"345"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6019231081008911}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6019231081008911}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1155/1995/28167","is_oa":true,"landing_page_url":"http://doi.org/10.1155/1995/28167","pdf_url":"https://downloads.hindawi.com/archive/1995/028167.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},{"id":"pmh:oai:hindawi.com:10.1155/1995/28167","is_oa":true,"landing_page_url":"https://doi.org/10.1155/1995/28167","pdf_url":null,"source":{"id":"https://openalex.org/S4306400340","display_name":"Hindawi Journal of Chemistry (Hindawi)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4210126990","host_organization_name":"Hindawi (United Kingdom)","host_organization_lineage":["https://openalex.org/I4210126990"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":""}],"best_oa_location":{"id":"doi:10.1155/1995/28167","is_oa":true,"landing_page_url":"http://doi.org/10.1155/1995/28167","pdf_url":"https://downloads.hindawi.com/archive/1995/028167.pdf","source":{"id":"https://openalex.org/S81291924","display_name":"VLSI design","issn_l":"1026-7123","issn":["1026-7123","1065-514X","1563-5171"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319869","host_organization_name":"Hindawi Publishing Corporation","host_organization_lineage":["https://openalex.org/P4310319869"],"host_organization_lineage_names":["Hindawi Publishing Corporation"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"VLSI Design","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2104225484.pdf","grobid_xml":"https://content.openalex.org/works/W2104225484.grobid-xml"},"referenced_works_count":48,"referenced_works":["https://openalex.org/W171561125","https://openalex.org/W1546930003","https://openalex.org/W1576648414","https://openalex.org/W1599718641","https://openalex.org/W1748621108","https://openalex.org/W1764854944","https://openalex.org/W1866211074","https://openalex.org/W1981031469","https://openalex.org/W1988985715","https://openalex.org/W1998871699","https://openalex.org/W2000800151","https://openalex.org/W2004659537","https://openalex.org/W2012613482","https://openalex.org/W2044918591","https://openalex.org/W2048299435","https://openalex.org/W2049937229","https://openalex.org/W2054156486","https://openalex.org/W2058497171","https://openalex.org/W2063422255","https://openalex.org/W2097053919","https://openalex.org/W2097074821","https://openalex.org/W2110425399","https://openalex.org/W2115457987","https://openalex.org/W2121372686","https://openalex.org/W2127380267","https://openalex.org/W2131685997","https://openalex.org/W2141025244","https://openalex.org/W2159830106","https://openalex.org/W2164989576","https://openalex.org/W2169223213","https://openalex.org/W2176300081","https://openalex.org/W2503011814","https://openalex.org/W2532148357","https://openalex.org/W3011233102","https://openalex.org/W3144368627","https://openalex.org/W3144701320","https://openalex.org/W3158830358","https://openalex.org/W4234609313","https://openalex.org/W4251322979","https://openalex.org/W4301216902","https://openalex.org/W6639479637","https://openalex.org/W6649948367","https://openalex.org/W6663024932","https://openalex.org/W6664074698","https://openalex.org/W6665255388","https://openalex.org/W6666445409","https://openalex.org/W6676995014","https://openalex.org/W6684313409"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2748952813","https://openalex.org/W2390279801","https://openalex.org/W2358668433","https://openalex.org/W4396701345","https://openalex.org/W2376932109","https://openalex.org/W2001405890","https://openalex.org/W4396696052","https://openalex.org/W2382290278","https://openalex.org/W4395014643"],"abstract_inverted_index":{"This":[0,45],"paper":[1],"presents":[2],"a":[3,6,61],"methodology":[4,17],"and":[5,43,65],"tool":[7,70],"box":[8,71],"for":[9],"system\u2010level":[10,36],"partitioning":[11,59,69],"in":[12],"the":[13,32,52,58,87,90,93],"behavioral":[14],"domain.":[15],"The":[16,55,68],"is":[18,28,60,76],"based":[19],"on":[20],"an":[21,48,81],"extended":[22],"finite":[23],"state":[24],"machine":[25],"model.":[26],"Partitioning":[27],"achieved":[29],"interactively":[30],"through":[31],"application":[33],"of":[34,51,57,63,92],"five":[35],"transformation":[37],"primitives:":[38],"MOVE,":[39],"MERGE,":[40],"SPLIT,":[41],"CUT":[42],"MAP.":[44],"scheme":[46],"allows":[47],"interactive":[49],"exploration":[50],"solution":[53],"space.":[54],"result":[56],"set":[62],"interconnected":[64],"heterogeneous":[66],"sub\u2010systems.":[67],"which":[72],"has":[73],"been":[74],"developed":[75],"named":[77],"PARTIE":[78],"PARTIF":[79],"includes":[80],"evaluation":[82],"feedback":[83],"loop":[84],"that":[85],"helps":[86],"designer":[88],"estimate":[89],"quality":[91],"design.":[94]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}