{"id":"https://openalex.org/W2079756655","doi":"https://doi.org/10.1147/jrd.2009.5388579","title":"IBM System z10 processor cache subsystem microarchitecture","display_name":"IBM System z10 processor cache subsystem microarchitecture","publication_year":2009,"publication_date":"2009-01-01","ids":{"openalex":"https://openalex.org/W2079756655","doi":"https://doi.org/10.1147/jrd.2009.5388579","mag":"2079756655"},"language":"en","primary_location":{"id":"doi:10.1147/jrd.2009.5388579","is_oa":false,"landing_page_url":"https://doi.org/10.1147/jrd.2009.5388579","pdf_url":null,"source":{"id":"https://openalex.org/S4210219925","display_name":"IBM Journal of Research and Development","issn_l":"0018-8646","issn":["0018-8646","2151-8556"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320652","host_organization_name":"IBM","host_organization_lineage":["https://openalex.org/P4310320652"],"host_organization_lineage_names":["IBM"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IBM Journal of Research and Development","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036546330","display_name":"P. Mak","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"P. Mak","raw_affiliation_strings":["IBM Systems and Technology Group, Poughkeepsie, NY, USA","IBM Systems and Technology Group, Poughkeepsie, New York#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Systems and Technology Group, Poughkeepsie, NY, USA","institution_ids":[]},{"raw_affiliation_string":"IBM Systems and Technology Group, Poughkeepsie, New York#TAB#","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084608767","display_name":"C. R. Walters","orcid":"https://orcid.org/0000-0002-3973-8155"},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"C. R. Walters","raw_affiliation_strings":["IBM Systems and Technology Group, Poughkeepsie, NY, USA","IBM Systems and Technology Group, Poughkeepsie, New York#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Systems and Technology Group, Poughkeepsie, NY, USA","institution_ids":[]},{"raw_affiliation_string":"IBM Systems and Technology Group, Poughkeepsie, New York#TAB#","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5037538316","display_name":"G. E. Strait","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"G. E. Strait","raw_affiliation_strings":["IBM Systems and Technology Group, Poughkeepsie, NY, USA","IBM Systems and Technology Group, Poughkeepsie, New York#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Systems and Technology Group, Poughkeepsie, NY, USA","institution_ids":[]},{"raw_affiliation_string":"IBM Systems and Technology Group, Poughkeepsie, New York#TAB#","institution_ids":["https://openalex.org/I1341412227"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I1341412227"],"apc_list":null,"apc_paid":null,"fwci":2.3722,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.8887279,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"53","issue":"1","first_page":"2:1","last_page":"2:12"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7311512231826782},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.6600902080535889},{"id":"https://openalex.org/keywords/pipeline-burst-cache","display_name":"Pipeline burst cache","score":0.6096789240837097},{"id":"https://openalex.org/keywords/ibm","display_name":"IBM","score":0.5990419387817383},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5655902624130249},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.5297071933746338},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.4858067035675049},{"id":"https://openalex.org/keywords/cache-pollution","display_name":"Cache pollution","score":0.468871146440506},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.45124268531799316},{"id":"https://openalex.org/keywords/smart-cache","display_name":"Smart Cache","score":0.45086154341697693},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.43405455350875854},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.3934965431690216}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7311512231826782},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.6600902080535889},{"id":"https://openalex.org/C157547923","wikidata":"https://www.wikidata.org/wiki/Q7197276","display_name":"Pipeline burst cache","level":5,"score":0.6096789240837097},{"id":"https://openalex.org/C70388272","wikidata":"https://www.wikidata.org/wiki/Q5968558","display_name":"IBM","level":2,"score":0.5990419387817383},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5655902624130249},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.5297071933746338},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.4858067035675049},{"id":"https://openalex.org/C113166858","wikidata":"https://www.wikidata.org/wiki/Q5015981","display_name":"Cache pollution","level":5,"score":0.468871146440506},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.45124268531799316},{"id":"https://openalex.org/C167713795","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"Smart Cache","level":5,"score":0.45086154341697693},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.43405455350875854},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.3934965431690216},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C171250308","wikidata":"https://www.wikidata.org/wiki/Q11468","display_name":"Nanotechnology","level":1,"score":0.0},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1147/jrd.2009.5388579","is_oa":false,"landing_page_url":"https://doi.org/10.1147/jrd.2009.5388579","pdf_url":null,"source":{"id":"https://openalex.org/S4210219925","display_name":"IBM Journal of Research and Development","issn_l":"0018-8646","issn":["0018-8646","2151-8556"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320652","host_organization_name":"IBM","host_organization_lineage":["https://openalex.org/P4310320652"],"host_organization_lineage_names":["IBM"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IBM Journal of Research and Development","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.5799999833106995}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1605252151","https://openalex.org/W2000859879","https://openalex.org/W2011110651","https://openalex.org/W2055028495","https://openalex.org/W2076264849","https://openalex.org/W2135077474","https://openalex.org/W2468463919"],"related_works":["https://openalex.org/W2012518269","https://openalex.org/W2399041033","https://openalex.org/W2404820046","https://openalex.org/W2072955902","https://openalex.org/W2162744059","https://openalex.org/W2376113834","https://openalex.org/W3140186264","https://openalex.org/W2086718556","https://openalex.org/W1576527819","https://openalex.org/W2146079099"],"abstract_inverted_index":{"With":[0],"the":[1,4,43,53,57,63,71,77,93,97,113,118,122,127],"introduction":[2],"of":[3,23,66,73,121],"high-frequency":[5],"IBM":[6,59],"System":[7,60],"z10\u2122":[8,54],"processor":[9,44,55,74,84,129],"design,":[10],"a":[11,28,48],"new,":[12],"robust":[13],"cache":[14,80,85,130],"hierarchy":[15],"was":[16],"needed":[17],"to":[18,21,35],"enable":[19],"up":[20],"80":[22],"these":[24],"processors":[25],"aggregated":[26],"into":[27],"tightly":[29],"coupled":[30],"symmetric":[31],"multiprocessor":[32],"(SMP)":[33],"system":[34],"reach":[36],"their":[37],"performance":[38],"potential.":[39],"Typically,":[40],"each":[41],"time":[42,65,95],"frequency":[45],"increases":[46],"by":[47,70],"significant":[49],"factor,":[50],"as":[51,68,90],"did":[52],"over":[56],"predecessor":[58],"z9\u00ae":[61],"processor,":[62],"access":[64],"data,":[67],"measured":[69],"number":[72],"cycles":[75],"beyond":[76],"level":[78],"1":[79],"on":[81,96],"an":[82],"identical":[83],"subsystem,":[86],"would":[87],"increase":[88],"proportionally":[89],"well":[91],"because":[92],"flight":[94],"chip":[98],"interconnects":[99],"across":[100],"multiple":[101],"hardware":[102],"packaging":[103],"levels":[104],"has":[105],"stayed":[106],"relatively":[107],"constant":[108],"in":[109],"nanoseconds.":[110],"To":[111],"address":[112],"latency":[114],"scaling":[115],"problem":[116],"and":[117,136],"increased":[119],"demand":[120],"larger":[123],"80-way":[124],"SMP":[125],"size,":[126],"z10":[128],"subsystem":[131],"introduces":[132],"new":[133],"innovative":[134],"concepts":[135],"solutions.":[137]},"counts_by_year":[{"year":2016,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}