{"id":"https://openalex.org/W4404590421","doi":"https://doi.org/10.1145/3705324","title":"SILVIA: Automated Superword-Level Parallelism Exploitation via HLS-specific LLVM Passes for Compute-Intensive FPGA Accelerators","display_name":"SILVIA: Automated Superword-Level Parallelism Exploitation via HLS-specific LLVM Passes for Compute-Intensive FPGA Accelerators","publication_year":2024,"publication_date":"2024-11-21","ids":{"openalex":"https://openalex.org/W4404590421","doi":"https://doi.org/10.1145/3705324"},"language":"en","primary_location":{"id":"doi:10.1145/3705324","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3705324","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3705324","source":{"id":"https://openalex.org/S112809824","display_name":"ACM Transactions on Reconfigurable Technology and Systems","issn_l":"1936-7406","issn":["1936-7406","1936-7414"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Reconfigurable Technology and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["arxiv","crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://dl.acm.org/doi/pdf/10.1145/3705324","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5001894048","display_name":"Giovanni Brignone","orcid":"https://orcid.org/0000-0002-1656-8376"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Giovanni Brignone","raw_affiliation_strings":["Politecnico di Torino, Turin, Italy","Politecnico di Torino, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Torino, Turin, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politecnico di Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5114740259","display_name":"Roberto Bosio","orcid":"https://orcid.org/0009-0003-3431-9618"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Roberto Bosio","raw_affiliation_strings":["Politecnico di Torino, Turin, Italy","Politecnico di Torino, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Torino, Turin, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politecnico di Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014986290","display_name":"Fabrizio Ottati","orcid":"https://orcid.org/0000-0003-2989-3634"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Fabrizio Ottati","raw_affiliation_strings":["Politecnico di Torino, Turin, Italy","Politecnico di Torino, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Torino, Turin, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politecnico di Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053137865","display_name":"Claudio Sanso\u00e8","orcid":"https://orcid.org/0000-0002-2565-9077"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Claudio Sanso\u00e8","raw_affiliation_strings":["Politecnico di Torino, Turin, Italy","Politecnico di Torino, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Torino, Turin, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politecnico di Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5050365912","display_name":"Luciano Lavagno","orcid":"https://orcid.org/0000-0002-9762-6522"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Luciano Lavagno","raw_affiliation_strings":["Politecnico di Torino, Turin, Italy","Politecnico di Torino, Italy"],"affiliations":[{"raw_affiliation_string":"Politecnico di Torino, Turin, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politecnico di Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5001894048"],"corresponding_institution_ids":["https://openalex.org/I177477856"],"apc_list":null,"apc_paid":null,"fwci":0.4824,"has_fulltext":true,"cited_by_count":1,"citation_normalized_percentile":{"value":0.65259619,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":"18","issue":"2","first_page":"1","last_page":"16"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8857079744338989},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.757893443107605},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6246005892753601},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.593045711517334},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5777499079704285},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.54521644115448},{"id":"https://openalex.org/keywords/software-pipelining","display_name":"Software pipelining","score":0.4781592786312103},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.41399070620536804},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.38652169704437256},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3524470329284668},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.29774826765060425},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2574586868286133},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.1806947886943817}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8857079744338989},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.757893443107605},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6246005892753601},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.593045711517334},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5777499079704285},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.54521644115448},{"id":"https://openalex.org/C188854837","wikidata":"https://www.wikidata.org/wiki/Q268469","display_name":"Software pipelining","level":3,"score":0.4781592786312103},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.41399070620536804},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.38652169704437256},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3524470329284668},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.29774826765060425},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2574586868286133},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.1806947886943817},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/3705324","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3705324","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3705324","source":{"id":"https://openalex.org/S112809824","display_name":"ACM Transactions on Reconfigurable Technology and Systems","issn_l":"1936-7406","issn":["1936-7406","1936-7414"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Reconfigurable Technology and Systems","raw_type":"journal-article"},{"id":"pmh:oai:arXiv.org:2411.11384","is_oa":true,"landing_page_url":"http://arxiv.org/abs/2411.11384","pdf_url":"https://arxiv.org/pdf/2411.11384","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"}],"best_oa_location":{"id":"doi:10.1145/3705324","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3705324","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3705324","source":{"id":"https://openalex.org/S112809824","display_name":"ACM Transactions on Reconfigurable Technology and Systems","issn_l":"1936-7406","issn":["1936-7406","1936-7414"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Reconfigurable Technology and Systems","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G1857088242","display_name":null,"funder_award_id":"Mission 4","funder_id":"https://openalex.org/F4320320300","funder_display_name":"European Commission"},{"id":"https://openalex.org/G2020622295","display_name":null,"funder_award_id":"Big Data","funder_id":"https://openalex.org/F4320320300","funder_display_name":"European Commission"},{"id":"https://openalex.org/G5405180196","display_name":null,"funder_award_id":"101097224","funder_id":"https://openalex.org/F4320319005","funder_display_name":"Key Digital Technologies Joint Undertaking"},{"id":"https://openalex.org/G8024291379","display_name":"Reconfigurable Heterogeneous Highly Parallel Processing Platform for safe and secure AI","funder_award_id":"101097224","funder_id":"https://openalex.org/F4320320300","funder_display_name":"European Commission"},{"id":"https://openalex.org/G8409961469","display_name":null,"funder_award_id":"Spoke 1","funder_id":"https://openalex.org/F4320320300","funder_display_name":"European Commission"}],"funders":[{"id":"https://openalex.org/F4320319005","display_name":"Key Digital Technologies Joint Undertaking","ror":null},{"id":"https://openalex.org/F4320320300","display_name":"European Commission","ror":"https://ror.org/00k4n6c32"}],"has_content":{"grobid_xml":false,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W4404590421.pdf"},"referenced_works_count":18,"referenced_works":["https://openalex.org/W2018055497","https://openalex.org/W2115572397","https://openalex.org/W2156499539","https://openalex.org/W2296760900","https://openalex.org/W2565125333","https://openalex.org/W2604319603","https://openalex.org/W2790678706","https://openalex.org/W4293025825","https://openalex.org/W4312121047","https://openalex.org/W4312121134","https://openalex.org/W4321637080","https://openalex.org/W4379471878","https://openalex.org/W4386765296","https://openalex.org/W4389163074","https://openalex.org/W4391429622","https://openalex.org/W4393168989","https://openalex.org/W4404788843","https://openalex.org/W6949136120"],"related_works":["https://openalex.org/W1876592433","https://openalex.org/W2083269738","https://openalex.org/W2612099726","https://openalex.org/W2129956396","https://openalex.org/W1978911128","https://openalex.org/W1508051931","https://openalex.org/W2614194112","https://openalex.org/W2160632767","https://openalex.org/W2530146034","https://openalex.org/W2951816406"],"abstract_inverted_index":{"High-level":[0],"synthesis":[1],"(HLS)":[2],"aims":[3],"at":[4],"democratizing":[5],"custom":[6],"hardware":[7,21],"acceleration":[8],"with":[9],"highly":[10],"abstracted":[11],"software-like":[12],"descriptions.":[13],"However,":[14],"efficient":[15,51],"accelerators":[16],"still":[17],"require":[18],"substantial":[19],"low-level":[20],"optimizations,":[22],"defeating":[23],"the":[24,28,98,101,116,141],"HLS":[25,75,105,127],"intent.":[26],"In":[27],"context":[29],"of":[30,100],"field-programmable":[31],"gate":[32],"arrays,":[33],"digital":[34],"signal":[35],"processors":[36],"(DSPs)":[37],"are":[38],"a":[39,45,91],"crucial":[40],"resource":[41],"that":[42,68],"typically":[43],"requires":[44],"significant":[46],"optimization":[47],"effort":[48],"for":[49,56,144,149],"its":[50,109],"utilization,":[52],"especially":[53],"when":[54],"used":[55],"sub-word":[57],"vectorization.":[58],"This":[59],"work":[60],"proposes":[61],"SILVIA,":[62],"an":[63,74],"open-source":[64],"LLVM":[65],"transformation":[66],"pass":[67],"automatically":[69],"identifies":[70],"superword-level":[71],"parallelism":[72],"within":[73],"design":[76],"and":[77,88,107,134,148,151],"exploits":[78],"it":[79],"by":[80,111,146,153],"packing":[81,112],"multiple":[82,113],"operations,":[83],"such":[84,129],"as":[85,130],"additions,":[86],"multiplications,":[87],"multiply-and-adds,":[89],"into":[90],"single":[92],"DSP.":[93],"SILVIA":[94],"is":[95],"integrated":[96],"in":[97],"flow":[99],"commercial":[102],"AMD":[103],"Vitis":[104],"tool":[106],"proves":[108],"effectiveness":[110],"operations":[114],"on":[115,123,155],"DSPs":[117],"without":[118],"any":[119],"manual":[120],"source-code":[121],"modifications":[122],"several":[124],"diverse":[125],"state-of-the-art":[126],"designs":[128],"convolutional":[131],"neural":[132],"networks":[133],"basic":[135],"linear":[136],"algebra":[137],"subprograms":[138],"accelerators,":[139],"reducing":[140],"DSP":[142],"utilization":[143],"additions":[145],"70%":[147],"multiplications":[150],"multiply-and-adds":[152],"50%":[154],"average.":[156]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2026-04-10T15:06:20.359241","created_date":"2025-10-10T00:00:00"}