{"id":"https://openalex.org/W4244048245","doi":"https://doi.org/10.1145/318013.318045","title":"A new method for verifying sequential circuits","display_name":"A new method for verifying sequential circuits","publication_year":1986,"publication_date":"1986-01-01","ids":{"openalex":"https://openalex.org/W4244048245","doi":"https://doi.org/10.1145/318013.318045"},"language":"en","primary_location":{"id":"doi:10.1145/318013.318045","is_oa":false,"landing_page_url":"https://doi.org/10.1145/318013.318045","pdf_url":null,"source":{"id":"https://openalex.org/S4363608963","display_name":"Proceedings of the 23rd ACM/IEEE conference on Design automation - DAC '86","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 23rd ACM/IEEE conference on Design automation  - DAC '86","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5047833204","display_name":"Kenneth J. Supowit","orcid":null},"institutions":[{"id":"https://openalex.org/I20089843","display_name":"Princeton University","ror":"https://ror.org/00hx57361","country_code":"US","type":"education","lineage":["https://openalex.org/I20089843"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Kenneth J. Supowit","raw_affiliation_strings":["Department of Computer Science, Princeton University, Princeton, NJ"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Princeton University, Princeton, NJ","institution_ids":["https://openalex.org/I20089843"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5078941390","display_name":"Steven J. Friedman","orcid":null},"institutions":[{"id":"https://openalex.org/I20089843","display_name":"Princeton University","ror":"https://ror.org/00hx57361","country_code":"US","type":"education","lineage":["https://openalex.org/I20089843"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Steven J. Friedman","raw_affiliation_strings":["Department of Computer Science, Princeton University, Princeton, NJ"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Princeton University, Princeton, NJ","institution_ids":["https://openalex.org/I20089843"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5047833204"],"corresponding_institution_ids":["https://openalex.org/I20089843"],"apc_list":null,"apc_paid":null,"fwci":1.0949,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.74444444,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"200","last_page":"207"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.991100013256073,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.747789204120636},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.6944352388381958},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.6771661639213562},{"id":"https://openalex.org/keywords/class","display_name":"Class (philosophy)","score":0.5133225321769714},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.45168524980545044},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.41353267431259155},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.40999776124954224},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.35175132751464844},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.09457603096961975},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.06850531697273254}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.747789204120636},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.6944352388381958},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.6771661639213562},{"id":"https://openalex.org/C2777212361","wikidata":"https://www.wikidata.org/wiki/Q5127848","display_name":"Class (philosophy)","level":2,"score":0.5133225321769714},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.45168524980545044},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.41353267431259155},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.40999776124954224},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.35175132751464844},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.09457603096961975},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.06850531697273254},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/318013.318045","is_oa":false,"landing_page_url":"https://doi.org/10.1145/318013.318045","pdf_url":null,"source":{"id":"https://openalex.org/S4363608963","display_name":"Proceedings of the 23rd ACM/IEEE conference on Design automation - DAC '86","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 23rd ACM/IEEE conference on Design automation  - DAC '86","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2746929098","https://openalex.org/W1970410908","https://openalex.org/W4296473373","https://openalex.org/W2782719366","https://openalex.org/W2542280163","https://openalex.org/W2540085505","https://openalex.org/W1518382973","https://openalex.org/W1976440785","https://openalex.org/W2059422871","https://openalex.org/W2533122910"],"abstract_inverted_index":{"We":[0],"present":[1],"an":[2,75],"algorithm":[3],"for":[4,59],"deciding":[5],"whether":[6],"two":[7],"given":[8,39],"synchronous,":[9],"logic-level":[10],"sequential":[11],"circuits":[12,40],"are":[13],"functionally":[14],"equivalent.":[15],"Our":[16],"approach":[17],"involves":[18],"a":[19,65,88],"formal":[20],"symbolic":[21],"comparison,":[22],"as":[23],"opposed":[24],"to":[25],"the":[26,44,53,69,83],"(often":[27],"very":[28],"time-consuming)":[29],"generation":[30],"and":[31,68],"simulation":[32],"of":[33,47,56,91],"numerous":[34],"test":[35],"vector":[36],"sequences.":[37],"The":[38],"need":[41],"not":[42],"have":[43,52],"same":[45,54],"number":[46,55],"states,":[48],"nor":[49],"must":[50],"they":[51],"inputs":[57],"\u2014":[58],"example,":[60],"one":[61],"circuit":[62],"may":[63],"be":[64],"parallel":[66],"implementation":[67],"other":[70],"serial.":[71],"Although":[72],"this":[73],"is":[74,85,99],"intractable":[76],"problem":[77],"in":[78],"general,":[79],"we":[80],"believe":[81],"that":[82],"method":[84],"useful":[86],"on":[87],"broad":[89],"class":[90],"practical":[92],"circuits;":[93],"our":[94],"computational":[95],"experience":[96],"thus":[97],"far":[98],"encouraging.":[100]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}