{"id":"https://openalex.org/W2615444103","doi":"https://doi.org/10.1145/3060403.3066872","title":"Exploiting Non-Volatility for Information Processing","display_name":"Exploiting Non-Volatility for Information Processing","publication_year":2017,"publication_date":"2017-05-10","ids":{"openalex":"https://openalex.org/W2615444103","doi":"https://doi.org/10.1145/3060403.3066872","mag":"2615444103"},"language":"en","primary_location":{"id":"doi:10.1145/3060403.3066872","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3060403.3066872","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Great Lakes Symposium on VLSI 2017","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5067589457","display_name":"Robert Perricone","orcid":null},"institutions":[{"id":"https://openalex.org/I107639228","display_name":"University of Notre Dame","ror":"https://ror.org/00mkhxb43","country_code":"US","type":"education","lineage":["https://openalex.org/I107639228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Robert Perricone","raw_affiliation_strings":["University of Notre Dame, South Bend, IN, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Notre Dame, South Bend, IN, USA","institution_ids":["https://openalex.org/I107639228"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008622930","display_name":"Li Tang","orcid":"https://orcid.org/0000-0002-7636-0876"},"institutions":[{"id":"https://openalex.org/I107639228","display_name":"University of Notre Dame","ror":"https://ror.org/00mkhxb43","country_code":"US","type":"education","lineage":["https://openalex.org/I107639228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Li Tang","raw_affiliation_strings":["University of Notre Dame, South Bend, IN, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Notre Dame, South Bend, IN, USA","institution_ids":["https://openalex.org/I107639228"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003032564","display_name":"Michael Niemier","orcid":"https://orcid.org/0000-0001-7776-4306"},"institutions":[{"id":"https://openalex.org/I107639228","display_name":"University of Notre Dame","ror":"https://ror.org/00mkhxb43","country_code":"US","type":"education","lineage":["https://openalex.org/I107639228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Michael Niemier","raw_affiliation_strings":["University of Notre Dame, South Bend, IN, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Notre Dame, South Bend, IN, USA","institution_ids":["https://openalex.org/I107639228"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100600905","display_name":"Xiaobo Sharon Hu","orcid":"https://orcid.org/0000-0002-6636-9738"},"institutions":[{"id":"https://openalex.org/I107639228","display_name":"University of Notre Dame","ror":"https://ror.org/00mkhxb43","country_code":"US","type":"education","lineage":["https://openalex.org/I107639228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"X. Sharon Hu","raw_affiliation_strings":["University of Notre Dame, South Bend, IN, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Notre Dame, South Bend, IN, USA","institution_ids":["https://openalex.org/I107639228"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2924,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.58668044,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"305","last_page":"310"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6939337253570557},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6915087103843689},{"id":"https://openalex.org/keywords/granularity","display_name":"Granularity","score":0.6136662364006042},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.5338742733001709},{"id":"https://openalex.org/keywords/volatility","display_name":"Volatility (finance)","score":0.43554747104644775},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.425481915473938},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4185158610343933},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3938063383102417},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.33584269881248474},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.21823301911354065},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.15418103337287903},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14128556847572327},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1163378357887268}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6939337253570557},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6915087103843689},{"id":"https://openalex.org/C177774035","wikidata":"https://www.wikidata.org/wiki/Q1246948","display_name":"Granularity","level":2,"score":0.6136662364006042},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.5338742733001709},{"id":"https://openalex.org/C91602232","wikidata":"https://www.wikidata.org/wiki/Q756115","display_name":"Volatility (finance)","level":2,"score":0.43554747104644775},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.425481915473938},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4185158610343933},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3938063383102417},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.33584269881248474},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.21823301911354065},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.15418103337287903},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14128556847572327},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1163378357887268},{"id":"https://openalex.org/C106159729","wikidata":"https://www.wikidata.org/wiki/Q2294553","display_name":"Financial economics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3060403.3066872","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3060403.3066872","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Great Lakes Symposium on VLSI 2017","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8999999761581421}],"awards":[],"funders":[{"id":"https://openalex.org/F4320331888","display_name":"Microelectronics Advanced Research Corporation","ror":"https://ror.org/047z4n946"},{"id":"https://openalex.org/F4320332180","display_name":"Defense Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1505400302","https://openalex.org/W1506854048","https://openalex.org/W1972841535","https://openalex.org/W1976915281","https://openalex.org/W1988773816","https://openalex.org/W1994065394","https://openalex.org/W1996573165","https://openalex.org/W1998549161","https://openalex.org/W2005522813","https://openalex.org/W2009053018","https://openalex.org/W2014744284","https://openalex.org/W2040475153","https://openalex.org/W2051108935","https://openalex.org/W2073184224","https://openalex.org/W2080592089","https://openalex.org/W2162020806","https://openalex.org/W2167259479","https://openalex.org/W2292257019","https://openalex.org/W2345813002","https://openalex.org/W2513641764","https://openalex.org/W2557869018","https://openalex.org/W2612333299","https://openalex.org/W2956574267","https://openalex.org/W3106468038","https://openalex.org/W4290463820"],"related_works":["https://openalex.org/W2931688134","https://openalex.org/W2377919138","https://openalex.org/W2378857091","https://openalex.org/W2999756192","https://openalex.org/W103652678","https://openalex.org/W4226090359","https://openalex.org/W2059697060","https://openalex.org/W936373746","https://openalex.org/W4382701072","https://openalex.org/W4256502920"],"abstract_inverted_index":{"The":[0],"emergence":[1],"of":[2,12,17,25,34,57,72,99,119,140],"non-volatile":[3],"(NV)":[4],"technologies":[5,32,60,121],"provides":[6],"an":[7,124],"opportunity":[8],"to":[9,27,38,52,88],"overcome":[10],"limitations":[11],"CMOS":[13],"(e.g.,":[14],"the":[15,28,55,62,70,117],"growth":[16],"leakage":[18],"power),":[19],"while":[20],"simultaneously":[21],"providing":[22],"a":[23,66,130],"degree":[24],"non-volatility":[26,49],"processor.":[29],"Spintronic":[30],"NV":[31,59,83,90,100,120],"are":[33],"particular":[35],"interest":[36],"due":[37],"their":[39,108],"high":[40],"integration":[41,74],"density,":[42],"low":[43],"device":[44],"count,":[45],"radiation":[46],"hardness,":[47],"and":[48,85,103,129],"when":[50],"compared":[51],"CMOS.":[53],"Quantifying":[54],"impact":[56,118],"spintronic":[58],"at":[61],"architecture/application":[63],"levels":[64],"introduces":[65],"unique":[67],"challenge":[68],"as":[69],"granularity":[71],"technology":[73],"can":[75],"vary":[76],"significantly":[77],"(i.e.,":[78],"from":[79],"heterogeneous":[80],"architectures":[81],"with":[82],"cache/memory":[84],"CMOS-based":[86],"logic,":[87],"completely":[89],"architectures).":[91],"In":[92],"this":[93],"work,":[94],"we":[95,115],"explore":[96],"three":[97],"classes":[98],"processors":[101],"(NVPs)":[102],"define":[104],"metrics":[105],"for":[106,122],"quantifying":[107],"respective":[109],"energy":[110,125],"savings.":[111],"As":[112],"case":[113],"studies,":[114],"evaluate":[116],"both":[123],"harvesting":[126],"non-pipelined":[127],"processor":[128,133],"general":[131],"purpose":[132],"executing":[134],"scientific":[135],"applications":[136],"under":[137],"varying":[138],"degrees":[139],"parallelism.":[141]},"counts_by_year":[{"year":2019,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}