{"id":"https://openalex.org/W2380011848","doi":"https://doi.org/10.1145/2902961.2903030","title":"Load Balanced On-Chip Power Delivery for Average Current Demand","display_name":"Load Balanced On-Chip Power Delivery for Average Current Demand","publication_year":2016,"publication_date":"2016-05-13","ids":{"openalex":"https://openalex.org/W2380011848","doi":"https://doi.org/10.1145/2902961.2903030","mag":"2380011848"},"language":"en","primary_location":{"id":"doi:10.1145/2902961.2903030","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2902961.2903030","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 26th edition on Great Lakes Symposium on VLSI","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5071724792","display_name":"Divya Pathak","orcid":"https://orcid.org/0000-0001-8887-6645"},"institutions":[{"id":"https://openalex.org/I72816309","display_name":"Drexel University","ror":"https://ror.org/04bdffz58","country_code":"US","type":"education","lineage":["https://openalex.org/I72816309"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Divya Pathak","raw_affiliation_strings":["Drexel University, Philadelphia, PA, USA"],"affiliations":[{"raw_affiliation_string":"Drexel University, Philadelphia, PA, USA","institution_ids":["https://openalex.org/I72816309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031394992","display_name":"Mohammad Hossein Hajkazemi","orcid":null},"institutions":[{"id":"https://openalex.org/I162714631","display_name":"George Mason University","ror":"https://ror.org/02jqj7156","country_code":"US","type":"education","lineage":["https://openalex.org/I162714631"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mohammad Hossein Hajkazemi","raw_affiliation_strings":["George Mason University, Fairfax, VA, USA"],"affiliations":[{"raw_affiliation_string":"George Mason University, Fairfax, VA, USA","institution_ids":["https://openalex.org/I162714631"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034212925","display_name":"Mohammad Khavari Tavana","orcid":"https://orcid.org/0000-0002-2038-4908"},"institutions":[{"id":"https://openalex.org/I162714631","display_name":"George Mason University","ror":"https://ror.org/02jqj7156","country_code":"US","type":"education","lineage":["https://openalex.org/I162714631"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mohammad Khavari Tavana","raw_affiliation_strings":["George Mason University, Fairfax, VA, USA"],"affiliations":[{"raw_affiliation_string":"George Mason University, Fairfax, VA, USA","institution_ids":["https://openalex.org/I162714631"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047382437","display_name":"Houman Homayoun","orcid":"https://orcid.org/0000-0001-8904-4699"},"institutions":[{"id":"https://openalex.org/I162714631","display_name":"George Mason University","ror":"https://ror.org/02jqj7156","country_code":"US","type":"education","lineage":["https://openalex.org/I162714631"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Houman Homayoun","raw_affiliation_strings":["George Mason University, Fairfax, VA, USA"],"affiliations":[{"raw_affiliation_string":"George Mason University, Fairfax, VA, USA","institution_ids":["https://openalex.org/I162714631"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5059641297","display_name":"Ioannis Savidis","orcid":"https://orcid.org/0000-0003-4230-1795"},"institutions":[{"id":"https://openalex.org/I72816309","display_name":"Drexel University","ror":"https://ror.org/04bdffz58","country_code":"US","type":"education","lineage":["https://openalex.org/I72816309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ioannis Savidis","raw_affiliation_strings":["Drexel University, Philadelphia, PA, USA"],"affiliations":[{"raw_affiliation_string":"Drexel University, Philadelphia, PA, USA","institution_ids":["https://openalex.org/I72816309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5071724792"],"corresponding_institution_ids":["https://openalex.org/I72816309"],"apc_list":null,"apc_paid":null,"fwci":0.47856605,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.70843755,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"439","last_page":"444"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5939308404922485},{"id":"https://openalex.org/keywords/buck-converter","display_name":"Buck converter","score":0.5646494626998901},{"id":"https://openalex.org/keywords/converters","display_name":"Converters","score":0.5502778887748718},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5259323716163635},{"id":"https://openalex.org/keywords/dynamic-demand","display_name":"Dynamic demand","score":0.5225809812545776},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5071067810058594},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.49260812997817993},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4687882661819458},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.46398022770881653},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.45253854990005493},{"id":"https://openalex.org/keywords/current-limiting","display_name":"Current limiting","score":0.42029842734336853},{"id":"https://openalex.org/keywords/power-management","display_name":"Power management","score":0.41630783677101135},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2952086925506592},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.29196780920028687}],"concepts":[{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5939308404922485},{"id":"https://openalex.org/C150818752","wikidata":"https://www.wikidata.org/wiki/Q83804","display_name":"Buck converter","level":3,"score":0.5646494626998901},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.5502778887748718},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5259323716163635},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.5225809812545776},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5071067810058594},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.49260812997817993},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4687882661819458},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.46398022770881653},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.45253854990005493},{"id":"https://openalex.org/C204106720","wikidata":"https://www.wikidata.org/wiki/Q15856134","display_name":"Current limiting","level":3,"score":0.42029842734336853},{"id":"https://openalex.org/C2778774385","wikidata":"https://www.wikidata.org/wiki/Q4437810","display_name":"Power management","level":3,"score":0.41630783677101135},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2952086925506592},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.29196780920028687},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2902961.2903030","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2902961.2903030","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 26th edition on Great Lakes Symposium on VLSI","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.9100000262260437}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W601886942","https://openalex.org/W1982463304","https://openalex.org/W1990884219","https://openalex.org/W1995301219","https://openalex.org/W1997048552","https://openalex.org/W2027557256","https://openalex.org/W2054166664","https://openalex.org/W2116175063","https://openalex.org/W2170382128","https://openalex.org/W2218701546","https://openalex.org/W2403172928","https://openalex.org/W3150612471","https://openalex.org/W4237419070"],"related_works":["https://openalex.org/W1642255152","https://openalex.org/W4236555467","https://openalex.org/W2155063924","https://openalex.org/W1604605630","https://openalex.org/W2000162505","https://openalex.org/W2069596239","https://openalex.org/W4242653504","https://openalex.org/W2119174988","https://openalex.org/W2377589743","https://openalex.org/W2160983551"],"abstract_inverted_index":{"A":[0,52],"dynamic":[1],"power":[2,62,87,111],"management":[3],"system":[4],"for":[5,84],"homogeneous":[6],"chip":[7,19],"multi-processors":[8],"(CMP)":[9],"is":[10,39,57,123],"proposed.":[11],"Each":[12],"core":[13],"of":[14,35,48,69,100,109],"the":[15,36,44,49,61,67,74,78,85,97,101,106,110,115,120],"CMP":[16,102],"includes":[17],"on":[18],"DC-DC":[20],"switching":[21,121],"buck":[22,37,71],"converters":[23,72],"that":[24],"are":[25],"interconnected":[26],"through":[27],"a":[28,93],"switch":[29],"network.":[30],"The":[31],"peak":[32,79],"current":[33,46,80],"rating":[34],"converter":[38],"selected":[40],"to":[41,92],"meet":[42],"only":[43],"average":[45],"demand":[47,76],"load":[50,54],"circuit.":[51],"real-time":[53],"balancing":[55],"algorithm":[56],"developed":[58],"which":[59],"reconfigures":[60],"delivery":[63,88,112],"network":[64],"by":[65,125],"combining":[66],"output":[68],"multiple":[70],"when":[73],"workload":[75],"exceeds":[77],"rating.":[81],"Simulation":[82],"results":[83],"proposed":[86],"method":[89],"indicate":[90],"up":[91],"44%":[94],"reduction":[95],"in":[96],"energy":[98],"consumption":[99],"system.":[103],"In":[104],"addition,":[105],"on-chip":[107,116],"footprint":[108],"network,":[113,122],"including":[114],"voltage":[117],"regulators":[118],"and":[119],"reduced":[124],"at":[126],"least":[127],"23%.":[128]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}