{"id":"https://openalex.org/W2145916223","doi":"https://doi.org/10.1145/2742060.2742061","title":"Untrusted Third Party Digital IP Cores","display_name":"Untrusted Third Party Digital IP Cores","publication_year":2015,"publication_date":"2015-05-19","ids":{"openalex":"https://openalex.org/W2145916223","doi":"https://doi.org/10.1145/2742060.2742061","mag":"2145916223"},"language":"en","primary_location":{"id":"doi:10.1145/2742060.2742061","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2742060.2742061","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 25th edition on Great Lakes Symposium on VLSI","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5007001727","display_name":"Anirban Sengupta","orcid":"https://orcid.org/0000-0002-8215-7903"},"institutions":[{"id":"https://openalex.org/I64295750","display_name":"Indian Institute of Technology Indore","ror":"https://ror.org/01hhf7w52","country_code":"IN","type":"education","lineage":["https://openalex.org/I64295750"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Anirban Sengupta","raw_affiliation_strings":["Indian Institute of Technology, Indore, Indore, India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology, Indore, Indore, India","institution_ids":["https://openalex.org/I64295750"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016638400","display_name":"Saumya Bhadauria","orcid":"https://orcid.org/0000-0002-6502-2695"},"institutions":[{"id":"https://openalex.org/I64295750","display_name":"Indian Institute of Technology Indore","ror":"https://ror.org/01hhf7w52","country_code":"IN","type":"education","lineage":["https://openalex.org/I64295750"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Saumya Bhadauria","raw_affiliation_strings":["Indian Institute of Technology, Indore, Indore, India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology, Indore, Indore, India","institution_ids":["https://openalex.org/I64295750"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5007001727"],"corresponding_institution_ids":["https://openalex.org/I64295750"],"apc_list":null,"apc_paid":null,"fwci":3.8758,"has_fulltext":false,"cited_by_count":21,"citation_normalized_percentile":{"value":0.93691989,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"167","last_page":"172"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9944999814033508,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9887999892234802,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/datapath","display_name":"Datapath","score":0.9802395105361938},{"id":"https://openalex.org/keywords/hardware-trojan","display_name":"Hardware Trojan","score":0.8556559681892395},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7237914800643921},{"id":"https://openalex.org/keywords/trojan","display_name":"Trojan","score":0.6637464165687561},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.46351444721221924},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4326595366001129},{"id":"https://openalex.org/keywords/constraint","display_name":"Constraint (computer-aided design)","score":0.43164339661598206},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4160766005516052},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.19280797243118286},{"id":"https://openalex.org/keywords/computer-security","display_name":"Computer security","score":0.15812444686889648},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14473801851272583},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1089026927947998}],"concepts":[{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.9802395105361938},{"id":"https://openalex.org/C2780873074","wikidata":"https://www.wikidata.org/wiki/Q5656397","display_name":"Hardware Trojan","level":3,"score":0.8556559681892395},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7237914800643921},{"id":"https://openalex.org/C174333608","wikidata":"https://www.wikidata.org/wiki/Q19635","display_name":"Trojan","level":2,"score":0.6637464165687561},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.46351444721221924},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4326595366001129},{"id":"https://openalex.org/C2776036281","wikidata":"https://www.wikidata.org/wiki/Q48769818","display_name":"Constraint (computer-aided design)","level":2,"score":0.43164339661598206},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4160766005516052},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.19280797243118286},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.15812444686889648},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14473801851272583},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1089026927947998},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2742060.2742061","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2742060.2742061","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 25th edition on Great Lakes Symposium on VLSI","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1967949394","https://openalex.org/W1972843069","https://openalex.org/W1992787530","https://openalex.org/W2012032225","https://openalex.org/W2055787130","https://openalex.org/W2101528158","https://openalex.org/W2115668016","https://openalex.org/W2150928734","https://openalex.org/W2724531490"],"related_works":["https://openalex.org/W4385434494","https://openalex.org/W3159333627","https://openalex.org/W3004467197","https://openalex.org/W2091750459","https://openalex.org/W2999465529","https://openalex.org/W4328053173","https://openalex.org/W1500594134","https://openalex.org/W3084939900","https://openalex.org/W2382172865","https://openalex.org/W1526642037"],"abstract_inverted_index":{"An":[0],"evolutionary":[1],"algorithm":[2,170],"(EA)":[3],"driven":[4],"novel":[5,135],"design":[6,50],"space":[7,51],"exploration":[8,52,114,141,151,160],"(DSE)":[9],"of":[10,53,81,92,100,116,142,152,184,195,198],"an":[11,153,190],"optimized":[12,59,119,154],"hardware":[13,32,60,131],"Trojan":[14,33,61,71,82,120,132,155],"secured":[15,34,62,72,121,156],"datapath":[16,35,73,122,157],"based":[17,123],"on":[18,31,124],"user":[19,55,118],"power-delay":[20],"constraint":[21,58],"during":[22,37],"high":[23],"level":[24],"synthesis":[25],"(HLS)":[26],"is":[27,74,83,166,173],"presented.":[28],"The":[29,127,159],"focus":[30],"generation":[36],"HLS":[38],"has":[39],"been":[40],"very":[41],"little":[42],"with":[43,186],"absolutely":[44],"zero":[45],"effort":[46],"so":[47],"far":[48],"in":[49,193],"a":[54,70,117],"multi-objective":[56],"(MO)":[57],"datapath.":[63],"This":[64],"problem":[65,136],"mandates":[66],"attention":[67],"as":[68,85,87,95,147,149],"producing":[69],"not":[75,84],"inconsequential.":[76],"Merely":[77],"the":[78,98,113,163],"detection":[79,90,133],"process":[80,115],"straightforward":[86],"concurrent":[88],"error":[89],"(CED)":[91],"transient":[93],"faults":[94],"it":[96],"involves":[97],"concept":[99],"multiple":[101],"third":[102],"party":[103],"intellectual":[104],"property":[105],"(3PIP)":[106],"vendors":[107],"to":[108],"facilitate":[109],"detection,":[110],"let":[111],"aside":[112],"MO":[125],"constraints.":[126],"proposed":[128,164],"DSE":[129],"for":[130,162,175],"includes":[134],"encoding":[137],"technique":[138],"that":[139],"enables":[140,150],"efficient":[143],"distinct":[144],"vendor":[145],"allocation":[146],"well":[148],"structure.":[158],"backbone":[161],"approach":[165,188],"bacterial":[167],"foraging":[168],"optimization":[169],"(BFOA)":[171],"which":[172],"known":[174],"its":[176],"adaptive":[177],"feature":[178],"(tumbling/swimming)":[179],"and":[180],"simplified":[181],"model.":[182],"Results":[183],"comparison":[185],"recent":[187],"indicated":[189],"average":[191],"improvement":[192],"quality":[194],"results":[196],"(QoR)":[197],">14.1%":[199]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":6}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}