{"id":"https://openalex.org/W2015218403","doi":"https://doi.org/10.1145/2593069.2593149","title":"Hardware-in-the-loop Simulation for CPU/GPU Heterogeneous Platforms","display_name":"Hardware-in-the-loop Simulation for CPU/GPU Heterogeneous Platforms","publication_year":2014,"publication_date":"2014-05-27","ids":{"openalex":"https://openalex.org/W2015218403","doi":"https://doi.org/10.1145/2593069.2593149","mag":"2015218403"},"language":"en","primary_location":{"id":"doi:10.1145/2593069.2593149","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2593069.2593149","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 51st Annual Design Automation Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5078169393","display_name":"Youngsub Ko","orcid":null},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Youngsub Ko","raw_affiliation_strings":["School of Electrical Engineering and Computer Science, Seoul National University, Seoul, Korea","School of Electrical Engineering and Computer Science; Seoul National University; Seoul; Korea"],"affiliations":[{"raw_affiliation_string":"School of Electrical Engineering and Computer Science, Seoul National University, Seoul, Korea","institution_ids":["https://openalex.org/I139264467"]},{"raw_affiliation_string":"School of Electrical Engineering and Computer Science; Seoul National University; Seoul; Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100412370","display_name":"Taeyoung Kim","orcid":"https://orcid.org/0000-0002-8353-1776"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Taeyoung Kim","raw_affiliation_strings":["School of Electrical Engineering and Computer Science, Seoul National University, Seoul, Korea","School of Electrical Engineering and Computer Science; Seoul National University; Seoul; Korea"],"affiliations":[{"raw_affiliation_string":"School of Electrical Engineering and Computer Science, Seoul National University, Seoul, Korea","institution_ids":["https://openalex.org/I139264467"]},{"raw_affiliation_string":"School of Electrical Engineering and Computer Science; Seoul National University; Seoul; Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029634385","display_name":"Youngmin Yi","orcid":"https://orcid.org/0000-0001-9802-2109"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]},{"id":"https://openalex.org/I124633538","display_name":"University of Seoul","ror":"https://ror.org/05en5nh73","country_code":"KR","type":"education","lineage":["https://openalex.org/I124633538"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Youngmin Yi","raw_affiliation_strings":["School of Electrical and Computer Engineering, University of Seoul, Seoul, Korea","School of Electrical and Computer Engineering, University of Seoul, Seoul, Korea#TAB#"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, University of Seoul, Seoul, Korea","institution_ids":["https://openalex.org/I124633538"]},{"raw_affiliation_string":"School of Electrical and Computer Engineering, University of Seoul, Seoul, Korea#TAB#","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100638903","display_name":"Myungsun Kim","orcid":"https://orcid.org/0000-0003-4254-4009"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Myungsun Kim","raw_affiliation_strings":["DMC R&D Samsung Electronics, Suwon, Korea","DMC R&D Samsung Electronics, Suwon, Korea#TAB#"],"affiliations":[{"raw_affiliation_string":"DMC R&D Samsung Electronics, Suwon, Korea","institution_ids":["https://openalex.org/I2250650973"]},{"raw_affiliation_string":"DMC R&D Samsung Electronics, Suwon, Korea#TAB#","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5029793438","display_name":"Soonhoi Ha","orcid":"https://orcid.org/0000-0001-7472-9142"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Soonhoi Ha","raw_affiliation_strings":["School of Electrical Engineering and Computer Science, Seoul National University, Seoul, Korea","School of Electrical Engineering and Computer Science; Seoul National University; Seoul; Korea"],"affiliations":[{"raw_affiliation_string":"School of Electrical Engineering and Computer Science, Seoul National University, Seoul, Korea","institution_ids":["https://openalex.org/I139264467"]},{"raw_affiliation_string":"School of Electrical Engineering and Computer Science; Seoul National University; Seoul; Korea","institution_ids":["https://openalex.org/I139264467"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5078169393"],"corresponding_institution_ids":["https://openalex.org/I139264467"],"apc_list":null,"apc_paid":null,"fwci":1.2259,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.78579031,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8001542091369629},{"id":"https://openalex.org/keywords/interfacing","display_name":"Interfacing","score":0.7526353597640991},{"id":"https://openalex.org/keywords/cpu-shielding","display_name":"CPU shielding","score":0.6223035454750061},{"id":"https://openalex.org/keywords/central-processing-unit","display_name":"Central processing unit","score":0.6147527098655701},{"id":"https://openalex.org/keywords/arm-architecture","display_name":"ARM architecture","score":0.5774141550064087},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.570370614528656},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5616351366043091},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.5003149509429932},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4996986389160156},{"id":"https://openalex.org/keywords/cuda","display_name":"CUDA","score":0.46275991201400757},{"id":"https://openalex.org/keywords/computer-architecture-simulator","display_name":"Computer architecture simulator","score":0.4426164925098419},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"Hardware acceleration","score":0.41621631383895874},{"id":"https://openalex.org/keywords/co-simulation","display_name":"Co-simulation","score":0.41621583700180054},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.33845028281211853},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.3298684358596802}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8001542091369629},{"id":"https://openalex.org/C2776303644","wikidata":"https://www.wikidata.org/wiki/Q1020499","display_name":"Interfacing","level":2,"score":0.7526353597640991},{"id":"https://openalex.org/C180613757","wikidata":"https://www.wikidata.org/wiki/Q5013757","display_name":"CPU shielding","level":3,"score":0.6223035454750061},{"id":"https://openalex.org/C49154492","wikidata":"https://www.wikidata.org/wiki/Q5300","display_name":"Central processing unit","level":2,"score":0.6147527098655701},{"id":"https://openalex.org/C26771161","wikidata":"https://www.wikidata.org/wiki/Q16980","display_name":"ARM architecture","level":2,"score":0.5774141550064087},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.570370614528656},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5616351366043091},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.5003149509429932},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4996986389160156},{"id":"https://openalex.org/C2778119891","wikidata":"https://www.wikidata.org/wiki/Q477690","display_name":"CUDA","level":2,"score":0.46275991201400757},{"id":"https://openalex.org/C201203610","wikidata":"https://www.wikidata.org/wiki/Q5157524","display_name":"Computer architecture simulator","level":2,"score":0.4426164925098419},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.41621631383895874},{"id":"https://openalex.org/C2780974030","wikidata":"https://www.wikidata.org/wiki/Q16951926","display_name":"Co-simulation","level":2,"score":0.41621583700180054},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.33845028281211853},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.3298684358596802}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2593069.2593149","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2593069.2593149","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 51st Annual Design Automation Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1979527452","https://openalex.org/W2031858079","https://openalex.org/W2032094184","https://openalex.org/W2044206819","https://openalex.org/W2117572946","https://openalex.org/W2147657366","https://openalex.org/W2152013967","https://openalex.org/W2154881390","https://openalex.org/W2178639449","https://openalex.org/W2296514843","https://openalex.org/W4299358365"],"related_works":["https://openalex.org/W3015832319","https://openalex.org/W2739876987","https://openalex.org/W2112394217","https://openalex.org/W3215171858","https://openalex.org/W3080250604","https://openalex.org/W356181765","https://openalex.org/W2359836642","https://openalex.org/W1554430734","https://openalex.org/W2070063975","https://openalex.org/W2364724572"],"abstract_inverted_index":{"Multi-core":[0],"CPU/GPU":[1,49],"heterogeneous":[2,50],"platforms":[3,51],"became":[4],"popular":[5],"in":[6,37,122],"embedded":[7],"systems.":[8],"A":[9,81],"full":[10,45,78],"system":[11,20,46,79],"simulator":[12,87,112],"is":[13,95,97,113,130],"typically":[14],"used":[15,114,131],"to":[16,115,132,152],"observe":[17],"the":[18,38,89,100,123,134,145],"internal":[19],"behavior":[21],"by":[22],"running":[23,60],"complete":[24],"software":[25],"stacks":[26],"without":[27],"modification":[28],"on":[29,144],"simulation":[30,70,148],"models":[31],"of":[32],"CPUs":[33],"and":[34,52,88,125],"other":[35],"devices":[36],"system.":[39],"However,":[40],"there":[41],"are":[42,56],"few":[43],"known":[44],"simulators":[47,55],"for":[48,59],"existent":[53],"GPU":[54,74,93,136],"prohibitively":[57],"slow":[58],"application":[61],"software.":[62],"In":[63,99],"this":[64],"paper,":[65],"we":[66,102],"propose":[67],"a":[68,77,107,118],"hardware-in-the-loop":[69,147],"technique":[71],"that":[72],"integrates":[73],"hardware":[75,94],"into":[76],"simulator.":[80],"novel":[82],"interfacing":[83],"mechanism":[84],"between":[85],"CPU":[86,121],"development":[90,128],"board,":[91],"where":[92,110],"integrated,":[96],"devised.":[98],"experiments,":[101],"took":[103],"Exynos":[104,127],"4412":[105],"as":[106],"case":[108],"study,":[109],"gem5":[111],"simulate":[116],"mainly":[117],"quad-core":[119],"ARM":[120],"platform":[124],"an":[126],"board":[129],"run":[133,141],"Mali":[135],"hardware.":[137],"We":[138],"could":[139],"successfully":[140],"Android":[142],"apps":[143],"proposed":[146],"framework":[149],"with":[150],"up":[151],"1.5":[153],"M":[154],"cycles":[155],"per":[156],"second":[157],"performance.":[158]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}