{"id":"https://openalex.org/W2043808058","doi":"https://doi.org/10.1145/2483028.2483125","title":"Power gating topologies in TSV based 3D integrated circuits","display_name":"Power gating topologies in TSV based 3D integrated circuits","publication_year":2013,"publication_date":"2013-05-02","ids":{"openalex":"https://openalex.org/W2043808058","doi":"https://doi.org/10.1145/2483028.2483125","mag":"2043808058"},"language":"en","primary_location":{"id":"doi:10.1145/2483028.2483125","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2483028.2483125","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5008029821","display_name":"Hailang Wang","orcid":"https://orcid.org/0009-0007-1481-2295"},"institutions":[{"id":"https://openalex.org/I59553526","display_name":"Stony Brook University","ror":"https://ror.org/05qghxh33","country_code":"US","type":"education","lineage":["https://openalex.org/I59553526"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Hailang Wang","raw_affiliation_strings":["Stony Brook University, Stony Brook, NY, USA"],"affiliations":[{"raw_affiliation_string":"Stony Brook University, Stony Brook, NY, USA","institution_ids":["https://openalex.org/I59553526"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5061262597","display_name":"Emre Salman","orcid":"https://orcid.org/0000-0001-6538-6803"},"institutions":[{"id":"https://openalex.org/I59553526","display_name":"Stony Brook University","ror":"https://ror.org/05qghxh33","country_code":"US","type":"education","lineage":["https://openalex.org/I59553526"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Emre Salman","raw_affiliation_strings":["Stony Brook University, Stony Brook, NY, USA"],"affiliations":[{"raw_affiliation_string":"Stony Brook University, Stony Brook, NY, USA","institution_ids":["https://openalex.org/I59553526"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5008029821"],"corresponding_institution_ids":["https://openalex.org/I59553526"],"apc_list":null,"apc_paid":null,"fwci":0.6196907,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.74887386,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"327","last_page":"328"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9923999905586243,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9908000230789185,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/power-gating","display_name":"Power gating","score":0.9049606323242188},{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.7633374929428101},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6420700550079346},{"id":"https://openalex.org/keywords/through-silicon-via","display_name":"Through-silicon via","score":0.5919996500015259},{"id":"https://openalex.org/keywords/gating","display_name":"Gating","score":0.5178985595703125},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4984288215637207},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.49498361349105835},{"id":"https://openalex.org/keywords/power-integrity","display_name":"Power integrity","score":0.4945807158946991},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4648387134075165},{"id":"https://openalex.org/keywords/three-dimensional-integrated-circuit","display_name":"Three-dimensional integrated circuit","score":0.4441155195236206},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.4421086013317108},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.4030942916870117},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.3855624198913574},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3506530523300171},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3438403010368347},{"id":"https://openalex.org/keywords/signal-integrity","display_name":"Signal integrity","score":0.2837004065513611},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.1866147518157959},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.1588149070739746},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.13187989592552185},{"id":"https://openalex.org/keywords/printed-circuit-board","display_name":"Printed circuit board","score":0.13112446665763855},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.0778082013130188}],"concepts":[{"id":"https://openalex.org/C2780700455","wikidata":"https://www.wikidata.org/wiki/Q7236515","display_name":"Power gating","level":4,"score":0.9049606323242188},{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.7633374929428101},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6420700550079346},{"id":"https://openalex.org/C45632049","wikidata":"https://www.wikidata.org/wiki/Q1578120","display_name":"Through-silicon via","level":3,"score":0.5919996500015259},{"id":"https://openalex.org/C194544171","wikidata":"https://www.wikidata.org/wiki/Q21105679","display_name":"Gating","level":2,"score":0.5178985595703125},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4984288215637207},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.49498361349105835},{"id":"https://openalex.org/C2777561913","wikidata":"https://www.wikidata.org/wiki/Q19599527","display_name":"Power integrity","level":4,"score":0.4945807158946991},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4648387134075165},{"id":"https://openalex.org/C59088047","wikidata":"https://www.wikidata.org/wiki/Q229370","display_name":"Three-dimensional integrated circuit","level":3,"score":0.4441155195236206},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.4421086013317108},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.4030942916870117},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.3855624198913574},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3506530523300171},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3438403010368347},{"id":"https://openalex.org/C44938667","wikidata":"https://www.wikidata.org/wiki/Q4503810","display_name":"Signal integrity","level":3,"score":0.2837004065513611},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.1866147518157959},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.1588149070739746},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.13187989592552185},{"id":"https://openalex.org/C120793396","wikidata":"https://www.wikidata.org/wiki/Q173350","display_name":"Printed circuit board","level":2,"score":0.13112446665763855},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0778082013130188},{"id":"https://openalex.org/C42407357","wikidata":"https://www.wikidata.org/wiki/Q521","display_name":"Physiology","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C160671074","wikidata":"https://www.wikidata.org/wiki/Q267131","display_name":"Wafer","level":2,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2483028.2483125","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2483028.2483125","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.6700000166893005}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":2,"referenced_works":["https://openalex.org/W2129904319","https://openalex.org/W2133038247"],"related_works":["https://openalex.org/W2259094912","https://openalex.org/W2027159884","https://openalex.org/W1990828594","https://openalex.org/W2089377260","https://openalex.org/W2046139226","https://openalex.org/W2513353273","https://openalex.org/W2549021975","https://openalex.org/W1998607656","https://openalex.org/W2146176401","https://openalex.org/W2809795632"],"abstract_inverted_index":{"Two":[0],"topologies":[1,31],"are":[2,71],"proposed":[3,25],"at":[4],"the":[5,33,54],"physical":[6,66],"level":[7],"to":[8],"achieve":[9],"reliable":[10],"power":[11,29,60,63],"gating":[12,30,64],"in":[13,53],"through":[14],"silicon":[15],"via":[16],"(TSV)":[17],"based":[18],"three-dimensional":[19],"(3D)":[20],"integrated":[21],"circuits":[22],"(ICs).":[23],"The":[24],"lumped":[26],"and":[27,45,68],"distributed":[28],"address":[32],"unique":[34],"differences":[35],"among":[36,59],"distinct":[37],"TSV":[38],"fabrication":[39],"methods":[40],"such":[41],"as":[42],"via-first,":[43],"via-middle,":[44],"via-last,":[46],"while":[47],"achieving,":[48],"on":[49],"average,":[50],"85%":[51],"reduction":[52],"leakage":[55],"power.":[56],"Related":[57],"tradeoffs":[58],"supply":[61],"noise,":[62,65],"area,":[67],"turn-on":[69],"time":[70],"also":[72],"investigated.":[73]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
