{"id":"https://openalex.org/W1964287716","doi":"https://doi.org/10.1145/2483028.2483101","title":"DRMA","display_name":"DRMA","publication_year":2013,"publication_date":"2013-05-02","ids":{"openalex":"https://openalex.org/W1964287716","doi":"https://doi.org/10.1145/2483028.2483101","mag":"1964287716"},"language":"en","primary_location":{"id":"doi:10.1145/2483028.2483101","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2483028.2483101","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5082403773","display_name":"Lawrance Zhang","orcid":null},"institutions":[{"id":"https://openalex.org/I31746571","display_name":"UNSW Sydney","ror":"https://ror.org/03r8z3t63","country_code":"AU","type":"education","lineage":["https://openalex.org/I31746571"]}],"countries":["AU"],"is_corresponding":true,"raw_author_name":"Lawrance Zhang","raw_affiliation_strings":["University of New South Wales, Sydney, Australia","University of New South wales, Sydney, Australia"],"affiliations":[{"raw_affiliation_string":"University of New South Wales, Sydney, Australia","institution_ids":["https://openalex.org/I31746571"]},{"raw_affiliation_string":"University of New South wales, Sydney, Australia","institution_ids":["https://openalex.org/I31746571"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5056701255","display_name":"Jude Angelo Ambrose","orcid":null},"institutions":[{"id":"https://openalex.org/I31746571","display_name":"UNSW Sydney","ror":"https://ror.org/03r8z3t63","country_code":"AU","type":"education","lineage":["https://openalex.org/I31746571"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"Jude Angelo Ambrose","raw_affiliation_strings":["University of New South Wales, Sydney, Australia","University of New South wales, Sydney, Australia"],"affiliations":[{"raw_affiliation_string":"University of New South Wales, Sydney, Australia","institution_ids":["https://openalex.org/I31746571"]},{"raw_affiliation_string":"University of New South wales, Sydney, Australia","institution_ids":["https://openalex.org/I31746571"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023505042","display_name":"Jorgen Peddersen","orcid":"https://orcid.org/0000-0001-5952-769X"},"institutions":[{"id":"https://openalex.org/I31746571","display_name":"UNSW Sydney","ror":"https://ror.org/03r8z3t63","country_code":"AU","type":"education","lineage":["https://openalex.org/I31746571"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"Jorgen Peddersen","raw_affiliation_strings":["University of New South Wales, Sydney, Australia","University of New South wales, Sydney, Australia"],"affiliations":[{"raw_affiliation_string":"University of New South Wales, Sydney, Australia","institution_ids":["https://openalex.org/I31746571"]},{"raw_affiliation_string":"University of New South wales, Sydney, Australia","institution_ids":["https://openalex.org/I31746571"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030042327","display_name":"Sri Parameswaran","orcid":"https://orcid.org/0000-0003-0435-9080"},"institutions":[{"id":"https://openalex.org/I31746571","display_name":"UNSW Sydney","ror":"https://ror.org/03r8z3t63","country_code":"AU","type":"education","lineage":["https://openalex.org/I31746571"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"Sri Parameswaran","raw_affiliation_strings":["University of New South Wales, Sydney, Australia","University of New South wales, Sydney, Australia"],"affiliations":[{"raw_affiliation_string":"University of New South Wales, Sydney, Australia","institution_ids":["https://openalex.org/I31746571"]},{"raw_affiliation_string":"University of New South wales, Sydney, Australia","institution_ids":["https://openalex.org/I31746571"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058096999","display_name":"Roshan Ragel","orcid":"https://orcid.org/0000-0002-4511-2335"},"institutions":[{"id":"https://openalex.org/I111199411","display_name":"University of Peradeniya","ror":"https://ror.org/025h79t26","country_code":"LK","type":"education","lineage":["https://openalex.org/I111199411"]}],"countries":["LK"],"is_corresponding":false,"raw_author_name":"Roshan Ragel","raw_affiliation_strings":["University of Peradeniya, Peradeniya, Sri Lanka","University of Peradeniya, Peradeniya, Sri Lanka#TAB#"],"affiliations":[{"raw_affiliation_string":"University of Peradeniya, Peradeniya, Sri Lanka","institution_ids":["https://openalex.org/I111199411"]},{"raw_affiliation_string":"University of Peradeniya, Peradeniya, Sri Lanka#TAB#","institution_ids":["https://openalex.org/I111199411"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5107748825","display_name":"Swarnalatha Radhakrishnan","orcid":"https://orcid.org/0000-0001-9583-8700"},"institutions":[{"id":"https://openalex.org/I111199411","display_name":"University of Peradeniya","ror":"https://ror.org/025h79t26","country_code":"LK","type":"education","lineage":["https://openalex.org/I111199411"]}],"countries":["LK"],"is_corresponding":false,"raw_author_name":"Swarnalatha Radhakrishnan","raw_affiliation_strings":["University of Peradeniya, Peradeniya, Sri Lanka","University of Peradeniya, Peradeniya, Sri Lanka#TAB#"],"affiliations":[{"raw_affiliation_string":"University of Peradeniya, Peradeniya, Sri Lanka","institution_ids":["https://openalex.org/I111199411"]},{"raw_affiliation_string":"University of Peradeniya, Peradeniya, Sri Lanka#TAB#","institution_ids":["https://openalex.org/I111199411"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110218098","display_name":"Kewal K. Saluja","orcid":null},"institutions":[{"id":"https://openalex.org/I135310074","display_name":"University of Wisconsin\u2013Madison","ror":"https://ror.org/01y2jtd41","country_code":"US","type":"education","lineage":["https://openalex.org/I135310074"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kewal K. Saluja","raw_affiliation_strings":["University of Wisconsin-Madison, Madison, WI, USA"],"affiliations":[{"raw_affiliation_string":"University of Wisconsin-Madison, Madison, WI, USA","institution_ids":["https://openalex.org/I135310074"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5082403773"],"corresponding_institution_ids":["https://openalex.org/I31746571"],"apc_list":null,"apc_paid":null,"fwci":0.6304,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.67270779,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"239","last_page":"244"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8075790405273438},{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.7492666244506836},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.708238959312439},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6438564658164978},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.6306264996528625},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.6129032969474792},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6066243052482605},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.5958070158958435},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5437331199645996},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.44864800572395325},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4269787669181824},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.11510390043258667}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8075790405273438},{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.7492666244506836},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.708238959312439},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6438564658164978},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.6306264996528625},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.6129032969474792},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6066243052482605},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.5958070158958435},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5437331199645996},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.44864800572395325},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4269787669181824},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.11510390043258667},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/2483028.2483101","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2483028.2483101","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8299999833106995,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":32,"referenced_works":["https://openalex.org/W1503212777","https://openalex.org/W1575535798","https://openalex.org/W1751576172","https://openalex.org/W1986704057","https://openalex.org/W1988516592","https://openalex.org/W2005343162","https://openalex.org/W2054388295","https://openalex.org/W2066789793","https://openalex.org/W2071494469","https://openalex.org/W2076065646","https://openalex.org/W2080618082","https://openalex.org/W2090068045","https://openalex.org/W2104225326","https://openalex.org/W2106200299","https://openalex.org/W2106922178","https://openalex.org/W2108795365","https://openalex.org/W2113558024","https://openalex.org/W2116514950","https://openalex.org/W2117105306","https://openalex.org/W2117385926","https://openalex.org/W2125189473","https://openalex.org/W2128221687","https://openalex.org/W2146791535","https://openalex.org/W2149375345","https://openalex.org/W2150973534","https://openalex.org/W2151345470","https://openalex.org/W2156413870","https://openalex.org/W2162097970","https://openalex.org/W2535924644","https://openalex.org/W3137536588","https://openalex.org/W3151280928","https://openalex.org/W4231662810"],"related_works":["https://openalex.org/W1977846727","https://openalex.org/W1976012348","https://openalex.org/W2614713859","https://openalex.org/W2002682434","https://openalex.org/W4387782849","https://openalex.org/W2137671689","https://openalex.org/W2012131147","https://openalex.org/W2113449380","https://openalex.org/W3146394219","https://openalex.org/W2157008728"],"abstract_inverted_index":{"Embedded":[0],"systems":[1],"are":[2,5,39,51],"ubiquitous":[3],"and":[4,14,48,73,119],"deployed":[6],"in":[7,71],"a":[8,34,59,143,150],"large":[9],"range":[10,22],"of":[11,23,36,121,130,137],"applications.":[12,37],"Designing":[13],"fabricating":[15],"Integrated":[16],"Circuits":[17],"(ICs)":[18],"targeting":[19],"such":[20],"different":[21],"applications":[24,111],"is":[25,135],"expensive.":[26],"Designers":[27],"seek":[28],"flexible":[29,63],"processors":[30],"which":[31,66],"efficiently":[32],"execute":[33,68,79,87],"multitude":[35],"FPGAs":[38],"considered":[40],"affordable,":[41],"but":[42],"design":[43],"cost,":[44],"high":[45],"reconfiguration":[46],"delay":[47],"power":[49],"consumption":[50],"all":[52],"prohibitive.":[53],"In":[54],"this":[55],"paper,":[56],"we":[57],"propose":[58],"novel":[60],"ASIC":[61],"based":[62],"MPSoC":[64,100],"architecture,":[65],"can":[67,75,103],"separate":[69],"tasks":[70,89],"parallel,":[72],"it":[74],"be":[76,104],"configured":[77],"to":[78,115],"single":[80,144],"task":[81],"with":[82,90],"wide":[83],"data":[84,92],"widths":[85],"or":[86,148],"multiple":[88],"varying":[91],"widths.":[93],"The":[94],"architecture":[95],"presented,":[96],"called":[97],"Dynamically":[98],"Reconfigurable":[99],"Architecture":[101],"(DRMA),":[102],"rapidly":[105],"reconfigured":[106],"through":[107],"instructions.":[108],"We":[109],"present":[110],"as":[112,139,149],"case":[113],"studies":[114],"showcase":[116],"the":[117,133],"flexibility":[118],"efficacy":[120],"DRMA.":[122],"Results":[123],"show":[124],"for":[125],"an":[126],"additional":[127],"area":[128],"overhead":[129],"about":[131],"5%,":[132],"system":[134],"capable":[136],"working":[138],"four":[140],"32-bit":[141],"processors,":[142],"128":[145],"bit":[146],"processor":[147],"pipelined":[151],"processing":[152],"system.":[153]},"counts_by_year":[{"year":2015,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2016-06-24T00:00:00"}