{"id":"https://openalex.org/W2038190779","doi":"https://doi.org/10.1145/2089142.2089151","title":"Exploring irregular memory accesses on FPGAs","display_name":"Exploring irregular memory accesses on FPGAs","publication_year":2011,"publication_date":"2011-11-13","ids":{"openalex":"https://openalex.org/W2038190779","doi":"https://doi.org/10.1145/2089142.2089151","mag":"2038190779"},"language":"en","primary_location":{"id":"doi:10.1145/2089142.2089151","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2089142.2089151","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 1st Workshop on Irregular Applications: Architectures and Algorithms","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5081796334","display_name":"Robert J. Halstead","orcid":null},"institutions":[{"id":"https://openalex.org/I103635307","display_name":"University of California, Riverside","ror":"https://ror.org/03nawhv43","country_code":"US","type":"education","lineage":["https://openalex.org/I103635307"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Robert J. Halstead","raw_affiliation_strings":["University of California, Riverside, Riverside, CA, USA","University of California, RIverside, Riverside, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California, Riverside, Riverside, CA, USA","institution_ids":["https://openalex.org/I103635307"]},{"raw_affiliation_string":"University of California, RIverside, Riverside, CA, USA","institution_ids":["https://openalex.org/I103635307"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012012492","display_name":"Jason Villarreal","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Jason Villarreal","raw_affiliation_strings":["Jacquard Computing, Riverside, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Jacquard Computing, Riverside, CA, USA","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5033921328","display_name":"Walid Najjar","orcid":"https://orcid.org/0000-0001-6761-6801"},"institutions":[{"id":"https://openalex.org/I103635307","display_name":"University of California, Riverside","ror":"https://ror.org/03nawhv43","country_code":"US","type":"education","lineage":["https://openalex.org/I103635307"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Walid Najjar","raw_affiliation_strings":["University of California, Riverside, Riverside, CA, USA","University of California, RIverside, Riverside, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California, Riverside, Riverside, CA, USA","institution_ids":["https://openalex.org/I103635307"]},{"raw_affiliation_string":"University of California, RIverside, Riverside, CA, USA","institution_ids":["https://openalex.org/I103635307"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.6307,"has_fulltext":false,"cited_by_count":20,"citation_normalized_percentile":{"value":0.83216169,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"31","last_page":"34"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7873646020889282},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6731005907058716},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6394414901733398},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.48441746830940247},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4608258008956909}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7873646020889282},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6731005907058716},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6394414901733398},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.48441746830940247},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4608258008956909}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/2089142.2089151","is_oa":false,"landing_page_url":"https://doi.org/10.1145/2089142.2089151","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 1st Workshop on Irregular Applications: Architectures and Algorithms","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.428.8701","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.428.8701","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cs.ucr.edu/~najjar/papers/2011/IAAA-2011.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W2054882590","https://openalex.org/W2055058950","https://openalex.org/W2081040934","https://openalex.org/W2120320870","https://openalex.org/W2127699991","https://openalex.org/W2131258677","https://openalex.org/W2158929733","https://openalex.org/W2622728018","https://openalex.org/W4232958218","https://openalex.org/W4244381167"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2111241003","https://openalex.org/W2096844293","https://openalex.org/W2363944576","https://openalex.org/W2351041855","https://openalex.org/W2570254841","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506","https://openalex.org/W2160474882"],"abstract_inverted_index":{"Algorithms":[0],"that":[1],"exhibit":[2,32],"irregular":[3,34,59,97],"memory":[4,18,35,49,60,93,98],"access":[5,19,36,50,61,99],"patterns":[6],"are":[7],"known":[8],"to":[9,67,106],"show":[10],"poor":[11],"performance":[12],"on":[13,45],"multiprocessor":[14],"architectures,":[15],"particularly":[16],"when":[17],"latency":[20,94],"is":[21],"variable.":[22],"Many":[23],"common":[24],"data":[25],"structures,":[26],"including":[27],"graphs,":[28],"trees,":[29],"and":[30],"linked-lists,":[31],"these":[33],"patterns.":[37,62,100],"While":[38],"FPGA-based":[39],"code":[40],"accelerators":[41],"have":[42,53],"been":[43,55,65],"successful":[44],"applications":[46],"with":[47,87],"regular":[48],"patterns,":[51],"they":[52],"not":[54],"further":[56],"explored":[57],"for":[58,85,111],"Multithreading":[63],"has":[64],"shown":[66],"be":[68],"an":[69],"effective":[70],"technique":[71],"in":[72],"masking":[73,91],"long":[74],"latencies.":[75],"We":[76,101],"describe":[77],"the":[78,88,92,103],"compiler":[79,105],"generation":[80],"of":[81,90],"concurrent":[82],"hardware":[83],"threads":[84],"FPGAs":[86],"objective":[89],"caused":[95],"by":[96],"extend":[102],"ROCCC":[104],"generate":[107],"customized":[108],"state":[109],"information":[110],"each":[112],"dynamically":[113],"generated":[114],"thread.":[115]},"counts_by_year":[{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}