{"id":"https://openalex.org/W4247828132","doi":"https://doi.org/10.1145/1621960","title":"Proceedings of the 10th workshop on MEmory performance: DEaling with Applications, systems and architecture","display_name":"Proceedings of the 10th workshop on MEmory performance: DEaling with Applications, systems and architecture","publication_year":2009,"publication_date":"2009-09-13","ids":{"openalex":"https://openalex.org/W4247828132","doi":"https://doi.org/10.1145/1621960"},"language":"en","primary_location":{"id":"doi:10.1145/1621960","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1621960","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":null,"raw_type":"proceedings"},"type":"paratext","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":true,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9657999873161316,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.964900016784668,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7358954548835754},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.6586563587188721},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.6118427515029907},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.6071025729179382},{"id":"https://openalex.org/keywords/domain","display_name":"Domain (mathematical analysis)","score":0.5141060948371887},{"id":"https://openalex.org/keywords/memory-architecture","display_name":"Memory architecture","score":0.5109202265739441},{"id":"https://openalex.org/keywords/memory-map","display_name":"Memory map","score":0.4264970123767853},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.36499524116516113},{"id":"https://openalex.org/keywords/shared-memory","display_name":"Shared memory","score":0.3552449941635132},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.33054593205451965},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.31951501965522766},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.19614624977111816}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7358954548835754},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.6586563587188721},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.6118427515029907},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.6071025729179382},{"id":"https://openalex.org/C36503486","wikidata":"https://www.wikidata.org/wiki/Q11235244","display_name":"Domain (mathematical analysis)","level":2,"score":0.5141060948371887},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.5109202265739441},{"id":"https://openalex.org/C74426580","wikidata":"https://www.wikidata.org/wiki/Q719484","display_name":"Memory map","level":3,"score":0.4264970123767853},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.36499524116516113},{"id":"https://openalex.org/C133875982","wikidata":"https://www.wikidata.org/wiki/Q764810","display_name":"Shared memory","level":2,"score":0.3552449941635132},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.33054593205451965},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.31951501965522766},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.19614624977111816},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1621960","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1621960","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":null,"raw_type":"proceedings"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Sustainable cities and communities","id":"https://metadata.un.org/sdg/11","score":0.5899999737739563}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W254684032","https://openalex.org/W2999459628","https://openalex.org/W1554378476","https://openalex.org/W2140386982","https://openalex.org/W2043352873","https://openalex.org/W4248614727","https://openalex.org/W2296275612","https://openalex.org/W2188391409","https://openalex.org/W2561005478","https://openalex.org/W4381612949"],"abstract_inverted_index":{"MEDEA":[0],"is":[1],"a":[2,10,55],"half":[3],"day":[4],"workshop":[5],"that":[6],"wants":[7],"to":[8,17],"be":[9],"forum":[11],"for":[12,25],"academic":[13],"and":[14,20,28,36,45,51,66,75,78],"industrial":[15],"people":[16],"exchange":[18],"ideas":[19],"experience":[21],"on":[22,62,80,83],"memory":[23,34,43,63,81],"architectures":[24],"general-purpose,":[26],"commercial":[27],"embedded":[29],"systems.":[30],"Main":[31],"topics":[32],"are":[33],"architecture":[35,50],"memory-related":[37],"performance/power":[38],"issues,":[39],"as":[40,42],"well":[41],"management":[44,82],"optimization":[46],"themes,":[47],"considering":[48],"system":[49],"application":[52],"domain":[53],"in":[54,68],"joint":[56],"manner.":[57],"The":[58],"program":[59],"presents":[60],"works":[61,79],"organization,":[64],"performance":[65],"power":[67],"various":[69],"kinds":[70],"of":[71],"systems":[72],"(e.g.":[73],"vector":[74],"heterogeneous":[76],"CMP),":[77],"CMP":[84],"architectures.":[85],"We":[86],"hope":[87],"you":[88],"enjoy":[89],"the":[90],"workshop.":[91]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
