{"id":"https://openalex.org/W2752992337","doi":"https://doi.org/10.1145/1509084","title":"Proceedings of the 9th workshop on MEmory performance: DEaling with Applications, systems and architecture","display_name":"Proceedings of the 9th workshop on MEmory performance: DEaling with Applications, systems and architecture","publication_year":2008,"publication_date":"2008-10-26","ids":{"openalex":"https://openalex.org/W2752992337","doi":"https://doi.org/10.1145/1509084","mag":"2752992337"},"language":"en","primary_location":{"id":"doi:10.1145/1509084","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1509084","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":null,"raw_type":"proceedings"},"type":"paratext","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"ACM","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"ACM","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"middle","author":{"id":null,"display_name":"Bartolini, S.","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Bartolini, S.","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"middle","author":{"id":null,"display_name":"Foglia, P.","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Foglia, P.","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"middle","author":{"id":null,"display_name":"Giorgi, R.","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Giorgi, R.","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"last","author":{"id":null,"display_name":"Prete, C. A.","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Prete, C. A.","raw_affiliation_strings":[],"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":true,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9908000230789185,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9908000230789185,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9782999753952026,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10101","display_name":"Cloud Computing and Resource Management","score":0.9739999771118164,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7802966833114624},{"id":"https://openalex.org/keywords/cache-only-memory-architecture","display_name":"Cache-only memory architecture","score":0.6063443422317505},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.5293594002723694},{"id":"https://openalex.org/keywords/non-uniform-memory-access","display_name":"Non-uniform memory access","score":0.5083932280540466},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4983041286468506},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.4845260977745056},{"id":"https://openalex.org/keywords/central-processing-unit","display_name":"Central processing unit","score":0.47117501497268677},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4671703279018402},{"id":"https://openalex.org/keywords/uniform-memory-access","display_name":"Uniform memory access","score":0.4654230773448944},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.45592737197875977},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.44327160716056824},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.4402260184288025},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.359970360994339},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.31307345628738403}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7802966833114624},{"id":"https://openalex.org/C3720319","wikidata":"https://www.wikidata.org/wiki/Q5015937","display_name":"Cache-only memory architecture","level":5,"score":0.6063443422317505},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.5293594002723694},{"id":"https://openalex.org/C133371097","wikidata":"https://www.wikidata.org/wiki/Q868014","display_name":"Non-uniform memory access","level":5,"score":0.5083932280540466},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4983041286468506},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.4845260977745056},{"id":"https://openalex.org/C49154492","wikidata":"https://www.wikidata.org/wiki/Q5300","display_name":"Central processing unit","level":2,"score":0.47117501497268677},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4671703279018402},{"id":"https://openalex.org/C51290061","wikidata":"https://www.wikidata.org/wiki/Q1936765","display_name":"Uniform memory access","level":4,"score":0.4654230773448944},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.45592737197875977},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.44327160716056824},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.4402260184288025},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.359970360994339},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.31307345628738403},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/1509084","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1509084","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":null,"raw_type":"proceedings"},{"id":"pmh:oai:usiena-air.unisi.it:11365/46807","is_oa":false,"landing_page_url":"http://doi.acm.org/10.1145/1509084","pdf_url":null,"source":{"id":"https://openalex.org/S4377196319","display_name":"Use Siena air (University of Siena)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I102064193","host_organization_name":"University of Siena","host_organization_lineage":["https://openalex.org/I102064193"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/other"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.6499999761581421}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W1598433531","https://openalex.org/W1974211070","https://openalex.org/W126098351","https://openalex.org/W4229967581","https://openalex.org/W2021929420","https://openalex.org/W2247651031","https://openalex.org/W254684032","https://openalex.org/W2782503170","https://openalex.org/W4321458411","https://openalex.org/W2316890442"],"abstract_inverted_index":{"CPU":[0,29],"speeds":[1],"have":[2],"increased":[3],"faster":[4],"than":[5],"the":[6,15,28,36,41],"rate":[7],"of":[8],"improvement":[9],"in":[10,14],"memory":[11,37],"access":[12],"latencies":[13],"recent":[16],"past.":[17],"As":[18],"a":[19],"result,":[20],"with":[21],"programs":[22],"that":[23],"suffer":[24],"excessive":[25],"cache":[26],"misses,":[27],"will":[30],"increasingly":[31],"be":[32],"stalled":[33],"waiting":[34],"for":[35],"system":[38],"to":[39],"provide":[40],"...":[42]},"counts_by_year":[],"updated_date":"2026-02-09T09:26:11.010843","created_date":"2025-10-10T00:00:00"}