{"id":"https://openalex.org/W2157506576","doi":"https://doi.org/10.1145/1084834.1084890","title":"High-level synthesis for large bit-width multipliers on FPGAs","display_name":"High-level synthesis for large bit-width multipliers on FPGAs","publication_year":2005,"publication_date":"2005-09-19","ids":{"openalex":"https://openalex.org/W2157506576","doi":"https://doi.org/10.1145/1084834.1084890","mag":"2157506576"},"language":"en","primary_location":{"id":"doi:10.1145/1084834.1084890","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1084834.1084890","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5018684814","display_name":"Gang Quan","orcid":"https://orcid.org/0000-0002-1007-4850"},"institutions":[{"id":"https://openalex.org/I155781252","display_name":"University of South Carolina","ror":"https://ror.org/02b6qw903","country_code":"US","type":"education","lineage":["https://openalex.org/I155781252"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Gang Quan","raw_affiliation_strings":["University of South Carolina, Columbia, SC"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of South Carolina, Columbia, SC","institution_ids":["https://openalex.org/I155781252"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111919652","display_name":"James P. Davis","orcid":null},"institutions":[{"id":"https://openalex.org/I155781252","display_name":"University of South Carolina","ror":"https://ror.org/02b6qw903","country_code":"US","type":"education","lineage":["https://openalex.org/I155781252"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"James P. Davis","raw_affiliation_strings":["University of South Carolina, Columbia, SC"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of South Carolina, Columbia, SC","institution_ids":["https://openalex.org/I155781252"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040310510","display_name":"Siddhaveerasharan Devarkal","orcid":null},"institutions":[{"id":"https://openalex.org/I155781252","display_name":"University of South Carolina","ror":"https://ror.org/02b6qw903","country_code":"US","type":"education","lineage":["https://openalex.org/I155781252"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Siddhaveerasharan Devarkal","raw_affiliation_strings":["University of South Carolina, Columbia, SC"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of South Carolina, Columbia, SC","institution_ids":["https://openalex.org/I155781252"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5031591405","display_name":"Duncan A. Buell","orcid":"https://orcid.org/0000-0002-4668-5848"},"institutions":[{"id":"https://openalex.org/I155781252","display_name":"University of South Carolina","ror":"https://ror.org/02b6qw903","country_code":"US","type":"education","lineage":["https://openalex.org/I155781252"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Duncan A. Buell","raw_affiliation_strings":["University of South Carolina, Columbia, SC"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of South Carolina, Columbia, SC","institution_ids":["https://openalex.org/I155781252"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5018684814"],"corresponding_institution_ids":["https://openalex.org/I155781252"],"apc_list":null,"apc_paid":null,"fwci":2.1797,"has_fulltext":false,"cited_by_count":26,"citation_normalized_percentile":{"value":0.883752,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"213","last_page":"218"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11693","display_name":"Cryptography and Residue Arithmetic","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.7474885582923889},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7163048386573792},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.6814988851547241},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6070340871810913},{"id":"https://openalex.org/keywords/operand","display_name":"Operand","score":0.5898469686508179},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5397298336029053},{"id":"https://openalex.org/keywords/estimator","display_name":"Estimator","score":0.4577537775039673},{"id":"https://openalex.org/keywords/integer","display_name":"Integer (computer science)","score":0.44437873363494873},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.4377765655517578},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.4044649600982666},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.35971683263778687},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3512237071990967},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.3296279311180115},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2659236490726471},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.2201937437057495},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.20736581087112427}],"concepts":[{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.7474885582923889},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7163048386573792},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.6814988851547241},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6070340871810913},{"id":"https://openalex.org/C55526617","wikidata":"https://www.wikidata.org/wiki/Q719375","display_name":"Operand","level":2,"score":0.5898469686508179},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5397298336029053},{"id":"https://openalex.org/C185429906","wikidata":"https://www.wikidata.org/wiki/Q1130160","display_name":"Estimator","level":2,"score":0.4577537775039673},{"id":"https://openalex.org/C97137487","wikidata":"https://www.wikidata.org/wiki/Q729138","display_name":"Integer (computer science)","level":2,"score":0.44437873363494873},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.4377765655517578},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.4044649600982666},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.35971683263778687},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3512237071990967},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.3296279311180115},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2659236490726471},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.2201937437057495},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.20736581087112427},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1084834.1084890","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1084834.1084890","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W32845244","https://openalex.org/W1508193711","https://openalex.org/W1584008964","https://openalex.org/W1660562555","https://openalex.org/W1981663184","https://openalex.org/W1986980197","https://openalex.org/W2004814164","https://openalex.org/W2026168884","https://openalex.org/W2030934436","https://openalex.org/W2036378739","https://openalex.org/W2068041061","https://openalex.org/W2070563545","https://openalex.org/W2104121286","https://openalex.org/W2115294662","https://openalex.org/W2125855853","https://openalex.org/W2129183345","https://openalex.org/W2137126326","https://openalex.org/W2141175904","https://openalex.org/W2151820033","https://openalex.org/W2752853835","https://openalex.org/W4210673018","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W2072220574","https://openalex.org/W4285082868","https://openalex.org/W2162004439","https://openalex.org/W2558076308","https://openalex.org/W4317402486","https://openalex.org/W2120552212","https://openalex.org/W2081051399","https://openalex.org/W2033037612","https://openalex.org/W2031620145","https://openalex.org/W3022503594"],"abstract_inverted_index":{"In":[0,69],"this":[1,70],"paper,":[2,71],"we":[3,72],"present":[4,128],"the":[5,96,114,121,145,149],"analysis,":[6],"design":[7,51,97,150],"and":[8,29,36,47,85,93,120,136],"implementation":[9,172],"of":[10,76,95,99,106,117,124,151,173,188],"an":[11,87,129],"estimator":[12,88,146,170],"to":[13],"realize":[14],"large":[15,58,63],"bit":[16],"width":[17],"unsigned":[18,79],"integer":[19,60,80],"multiplier":[20,23,81,110],"units.":[21],"Larger":[22],"units":[24],"are":[25],"required":[26],"for":[27,33,53,139],"cryptography":[28],"error":[30],"correction":[31],"circuits":[32,55,82],"more":[34],"secure":[35],"reliable":[37],"transmissions":[38],"over":[39],"highly":[40],"insecure":[41],"and/or":[42],"noisy":[43],"channels":[44],"in":[45,91,148],"networking":[46],"multimedia":[48],"applications.":[49],"The":[50],"space":[52,98],"these":[54],"is":[56,65],"very":[57],"when":[59,184],"multiplication":[61],"on":[62,104,161,191],"operands":[64],"carried":[66],"out":[67],"hierarchically.":[68],"explore":[73],"automated":[74],"synthesis":[75],"high":[77,193],"bit-width":[78],"by":[83],"defining":[84],"validating":[86],"function":[89],"used":[90],"search":[92],"analysis":[94,105],"such":[100],"circuits.":[101],"We":[102,127,143,166],"focus":[103],"a":[107,152,155,162,192],"hybrid":[108],"hierarchical":[109],"scheme":[111],"that":[112,132,168,187],"combines":[113],"throughput":[115],"advantages":[116],"parallel":[118],"multipliers":[119],"resource":[122,137],"cost-effectiveness":[123],"serial":[125],"ones.":[126],"analytical":[130],"model":[131,141,147],"rapidly":[133],"predicts":[134],"timing":[135],"usage":[138],"selected":[140],"candidates.":[142],"evaluate":[144],"practical":[153],"application,":[154],"256-bit":[156],"elliptic":[157],"curve":[158],"adder":[159],"implemented":[160],"Xilinx":[163],"FPGA":[164],"fabric.":[165],"show":[167],"our":[169],"allows":[171],"fast,":[174],"efficient":[175],"circuits,":[176],"where":[177],"resultant":[178],"designs":[179],"provide":[180],"order-of-magnitude":[181],"performance":[182,194],"improvements":[183],"compared":[185],"with":[186],"software":[189],"implementations":[190],"computing":[195],"platform.":[196]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":3},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":2}],"updated_date":"2026-05-09T13:55:54.758798","created_date":"2025-10-10T00:00:00"}
