{"id":"https://openalex.org/W2094826013","doi":"https://doi.org/10.1145/1050330.1050341","title":"Implementation of MADM algorithms on FPGA based platforms","display_name":"Implementation of MADM algorithms on FPGA based platforms","publication_year":2004,"publication_date":"2004-01-01","ids":{"openalex":"https://openalex.org/W2094826013","doi":"https://doi.org/10.1145/1050330.1050341","mag":"2094826013"},"language":"en","primary_location":{"id":"doi:10.1145/1050330.1050341","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1050330.1050341","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 5th international conference on Computer systems and technologies - CompSysTech '04","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5018519502","display_name":"Ivan Krasimirov Kanev","orcid":null},"institutions":[{"id":"https://openalex.org/I31151848","display_name":"Technical University of Sofia","ror":"https://ror.org/052prhs50","country_code":"BG","type":"education","lineage":["https://openalex.org/I31151848"]}],"countries":["BG"],"is_corresponding":true,"raw_author_name":"Ivan Kanev","raw_affiliation_strings":["Technical University Sofia - Branch, Plovdiv","Technical University-Sofia, branch Plovdiv"],"affiliations":[{"raw_affiliation_string":"Technical University Sofia - Branch, Plovdiv","institution_ids":["https://openalex.org/I31151848"]},{"raw_affiliation_string":"Technical University-Sofia, branch Plovdiv","institution_ids":["https://openalex.org/I31151848"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5018519502"],"corresponding_institution_ids":["https://openalex.org/I31151848"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.14972158,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"1"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10901","display_name":"Advanced Data Compression Techniques","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10901","display_name":"Advanced Data Compression Techniques","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10201","display_name":"Speech Recognition and Synthesis","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10860","display_name":"Speech and Audio Processing","score":0.9959999918937683,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8871126770973206},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.791185736656189},{"id":"https://openalex.org/keywords/data-compression","display_name":"Data compression","score":0.5043872594833374},{"id":"https://openalex.org/keywords/algorithm-design","display_name":"Algorithm design","score":0.4543619751930237},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4367571771144867},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4332635998725891},{"id":"https://openalex.org/keywords/compression","display_name":"Compression (physics)","score":0.4171850085258484},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3957917094230652},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3783038854598999}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8871126770973206},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.791185736656189},{"id":"https://openalex.org/C78548338","wikidata":"https://www.wikidata.org/wiki/Q2493","display_name":"Data compression","level":2,"score":0.5043872594833374},{"id":"https://openalex.org/C106516650","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm design","level":2,"score":0.4543619751930237},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4367571771144867},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4332635998725891},{"id":"https://openalex.org/C180016635","wikidata":"https://www.wikidata.org/wiki/Q2712821","display_name":"Compression (physics)","level":2,"score":0.4171850085258484},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3957917094230652},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3783038854598999},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.0},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/1050330.1050341","is_oa":false,"landing_page_url":"https://doi.org/10.1145/1050330.1050341","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 5th international conference on Computer systems and technologies - CompSysTech '04","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1517289305","https://openalex.org/W2069501481","https://openalex.org/W2166173829","https://openalex.org/W3126480075"],"related_works":["https://openalex.org/W2111241003","https://openalex.org/W4200391368","https://openalex.org/W2355315220","https://openalex.org/W2210979487","https://openalex.org/W2074043759","https://openalex.org/W2373535795","https://openalex.org/W2082487009","https://openalex.org/W2612632602","https://openalex.org/W2321805087","https://openalex.org/W2268808286"],"abstract_inverted_index":{"MADM":[0],"algorithms":[1,21],"are":[2],"a":[3],"version":[4],"of":[5,11,19,30,41],"the":[6,17,31,39],"ADM":[7],"method":[8],"for":[9],"compression":[10],"speech":[12],"signals.":[13],"In":[14],"this":[15],"paper":[16],"implementation":[18],"these":[20],"on":[22],"FPGA":[23],"based":[24],"platforms":[25],"is":[26],"presented.":[27],"The":[28],"outputs":[29],"research":[32],"carried":[33],"out":[34],"may":[35],"be":[36],"used":[37],"in":[38],"design":[40],"IVR":[42],"or":[43],"VM":[44],"systems.":[45]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
