{"id":"https://openalex.org/W4250148793","doi":"https://doi.org/10.1145/77726","title":"Proceedings of the 4th international conference on Supercomputing","display_name":"Proceedings of the 4th international conference on Supercomputing","publication_year":1990,"publication_date":"1990-06-01","ids":{"openalex":"https://openalex.org/W4250148793","doi":"https://doi.org/10.1145/77726"},"language":"en","primary_location":{"id":"doi:10.1145/77726","is_oa":false,"landing_page_url":"https://doi.org/10.1145/77726","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":null,"raw_type":"proceedings"},"type":"paratext","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":true,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9391000270843506,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9391000270843506,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9261000156402588,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/supercomputer","display_name":"Supercomputer","score":0.8860403299331665},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7553884387016296},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6718920469284058},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.6261971592903137},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.5372016429901123},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.502044677734375},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.4278469979763031},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.2994629740715027}],"concepts":[{"id":"https://openalex.org/C83283714","wikidata":"https://www.wikidata.org/wiki/Q121117","display_name":"Supercomputer","level":2,"score":0.8860403299331665},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7553884387016296},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6718920469284058},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.6261971592903137},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.5372016429901123},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.502044677734375},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.4278469979763031},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.2994629740715027}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/77726","is_oa":false,"landing_page_url":"https://doi.org/10.1145/77726","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":null,"raw_type":"proceedings"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Sustainable cities and communities","score":0.5299999713897705,"id":"https://metadata.un.org/sdg/11"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W1980880150","https://openalex.org/W1599154403","https://openalex.org/W325986762","https://openalex.org/W2092845486","https://openalex.org/W2123607806","https://openalex.org/W2159088946","https://openalex.org/W2509294597","https://openalex.org/W4237297230","https://openalex.org/W1487480684","https://openalex.org/W917082514"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"the":[3,15],"architectural":[4],"design":[5],"and":[6,30],"RISC":[7,28],"based":[8],"implementation":[9],"of":[10],"a":[11],"prototype":[12],"supercomputer,":[13],"namely":[14],"Orthogonal":[16],"MultiProcessor":[17],"(OMP).":[18],"The":[19],"OMP":[20],"system":[21],"is":[22],"constructed":[23],"with":[24],"16":[25],"Intel":[26],"1860":[27],"microprocessors":[29],"256":[31],"parallel":[32],"memory":[33],"modules,":[34],"...":[35]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}