{"id":"https://openalex.org/W2123405452","doi":"https://doi.org/10.1145/505306.505330","title":"Energy-delay efficiency of VLSI computations","display_name":"Energy-delay efficiency of VLSI computations","publication_year":2002,"publication_date":"2002-04-18","ids":{"openalex":"https://openalex.org/W2123405452","doi":"https://doi.org/10.1145/505306.505330","mag":"2123405452"},"language":"en","primary_location":{"id":"doi:10.1145/505306.505330","is_oa":false,"landing_page_url":"https://doi.org/10.1145/505306.505330","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 12th ACM Great Lakes symposium on VLSI","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5012118252","display_name":"Paul Penzes","orcid":null},"institutions":[{"id":"https://openalex.org/I122411786","display_name":"California Institute of Technology","ror":"https://ror.org/05dxps055","country_code":"US","type":"education","lineage":["https://openalex.org/I122411786"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Paul I P\u00e9nzes","raw_affiliation_strings":["California Institute of Technology, Pasadena, CA","[California Institute of Technology, Pasadena, CA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"California Institute of Technology, Pasadena, CA","institution_ids":["https://openalex.org/I122411786"]},{"raw_affiliation_string":"[California Institute of Technology, Pasadena, CA]","institution_ids":["https://openalex.org/I122411786"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5113509326","display_name":"Alain J. Martin","orcid":null},"institutions":[{"id":"https://openalex.org/I122411786","display_name":"California Institute of Technology","ror":"https://ror.org/05dxps055","country_code":"US","type":"education","lineage":["https://openalex.org/I122411786"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Alain J. Martin","raw_affiliation_strings":["California Institute of Technology, Pasadena, CA","[California Institute of Technology, Pasadena, CA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"California Institute of Technology, Pasadena, CA","institution_ids":["https://openalex.org/I122411786"]},{"raw_affiliation_string":"[California Institute of Technology, Pasadena, CA]","institution_ids":["https://openalex.org/I122411786"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":5.505,"has_fulltext":false,"cited_by_count":61,"citation_normalized_percentile":{"value":0.96432687,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"104","last_page":"111"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.6854392886161804},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.6606118679046631},{"id":"https://openalex.org/keywords/metric","display_name":"Metric (unit)","score":0.637924075126648},{"id":"https://openalex.org/keywords/energy","display_name":"Energy (signal processing)","score":0.6319350600242615},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.5962187051773071},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.5869735479354858},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5800166130065918},{"id":"https://openalex.org/keywords/sizing","display_name":"Sizing","score":0.5423967838287354},{"id":"https://openalex.org/keywords/function","display_name":"Function (biology)","score":0.5190266370773315},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.4614473879337311},{"id":"https://openalex.org/keywords/propagation-delay","display_name":"Propagation delay","score":0.4497796595096588},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.4183160662651062},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.38907334208488464},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.35110312700271606},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2784152030944824},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.25719401240348816},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.19757962226867676},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.12005230784416199},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09159708023071289},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08863905072212219},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.06976008415222168}],"concepts":[{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.6854392886161804},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.6606118679046631},{"id":"https://openalex.org/C176217482","wikidata":"https://www.wikidata.org/wiki/Q860554","display_name":"Metric (unit)","level":2,"score":0.637924075126648},{"id":"https://openalex.org/C186370098","wikidata":"https://www.wikidata.org/wiki/Q442787","display_name":"Energy (signal processing)","level":2,"score":0.6319350600242615},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.5962187051773071},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.5869735479354858},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5800166130065918},{"id":"https://openalex.org/C2777767291","wikidata":"https://www.wikidata.org/wiki/Q1080291","display_name":"Sizing","level":2,"score":0.5423967838287354},{"id":"https://openalex.org/C14036430","wikidata":"https://www.wikidata.org/wiki/Q3736076","display_name":"Function (biology)","level":2,"score":0.5190266370773315},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4614473879337311},{"id":"https://openalex.org/C90806461","wikidata":"https://www.wikidata.org/wiki/Q1144416","display_name":"Propagation delay","level":2,"score":0.4497796595096588},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.4183160662651062},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.38907334208488464},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.35110312700271606},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2784152030944824},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.25719401240348816},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.19757962226867676},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.12005230784416199},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09159708023071289},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08863905072212219},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.06976008415222168},{"id":"https://openalex.org/C78458016","wikidata":"https://www.wikidata.org/wiki/Q840400","display_name":"Evolutionary biology","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/505306.505330","is_oa":false,"landing_page_url":"https://doi.org/10.1145/505306.505330","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 12th ACM Great Lakes symposium on VLSI","raw_type":"proceedings-article"},{"id":"pmh:oai:authors.library.caltech.edu:72645","is_oa":false,"landing_page_url":"https://resolver.caltech.edu/CaltechAUTHORS:20161207-165804629","pdf_url":null,"source":{"id":"https://openalex.org/S4306402161","display_name":"CaltechAUTHORS (California Institute of Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I122411786","host_organization_name":"California Institute of Technology","host_organization_lineage":["https://openalex.org/I122411786"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Book Section"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.9100000262260437,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1546157337","https://openalex.org/W1609026976","https://openalex.org/W1778932233","https://openalex.org/W1809169466","https://openalex.org/W2149009819","https://openalex.org/W2162211138","https://openalex.org/W2168843308","https://openalex.org/W4200161408","https://openalex.org/W4236743822"],"related_works":["https://openalex.org/W2015155483","https://openalex.org/W2778612236","https://openalex.org/W2778973728","https://openalex.org/W2556310577","https://openalex.org/W2139901278","https://openalex.org/W2057187623","https://openalex.org/W2760821214","https://openalex.org/W2474203529","https://openalex.org/W3020887452","https://openalex.org/W1498176184"],"abstract_inverted_index":{"In":[0],"this":[1,23,111],"paper":[2],"we":[3,56],"introduce":[4],"an":[5],"energy-delay":[6,123],"efficiency":[7,124],"metric":[8],"that":[9],"captures":[10],"any":[11],"trade-off":[12],"between":[13],"the":[14,17,20,27,47,52,94,121],"energy":[15,50],"and":[16,29,36,49,55,59,72],"delay":[18,48],"of":[19,32,51,78,96,106,110,119,125],"computation.We":[21],"apply":[22],"new":[24],"concept":[25],"to":[26,39,87,100],"parallel":[28],"sequential":[30],"composition":[31],"circuits":[33,40],"in":[34,37],"general":[35],"particular":[38],"optimized":[41,53,83],"through":[42],"transistor":[43],"sizing.":[44],"We":[45,68],"bound":[46],"circuit":[54],"give":[57,70],"necessary":[58,71],"sufficient":[60,73],"conditions":[61,74],"under":[62,75],"which":[63,76],"these":[64],"bounds":[65],"are":[66],"reached.":[67],"also":[69],"subcomponents":[77],"a":[79,97],"design":[80],"can":[81],"be":[82],"independently":[84],"so":[85],"as":[86],"yield":[88],"global":[89],"optimum":[90],"when":[91],"recomposed.We":[92],"demonstrate":[93],"utility":[95],"minimum-energy":[98,112],"function":[99,113],"capture":[101],"high":[102],"level":[103],"compositional":[104],"properties":[105],"circuits.":[107,126],"The":[108],"use":[109],"yields":[114],"practical":[115],"insight":[116],"into":[117],"ways":[118],"improving":[120],"overall":[122]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":3},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":5}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
