{"id":"https://openalex.org/W2108665876","doi":"https://doi.org/10.1145/505306.505314","title":"Fast and accurate wire delay estimation for physical synthesis of large ASICs","display_name":"Fast and accurate wire delay estimation for physical synthesis of large ASICs","publication_year":2002,"publication_date":"2002-04-18","ids":{"openalex":"https://openalex.org/W2108665876","doi":"https://doi.org/10.1145/505306.505314","mag":"2108665876"},"language":"en","primary_location":{"id":"doi:10.1145/505306.505314","is_oa":false,"landing_page_url":"https://doi.org/10.1145/505306.505314","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 12th ACM Great Lakes symposium on VLSI","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5045722906","display_name":"Ruchir Puri","orcid":"https://orcid.org/0009-0006-8803-7079"},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]},{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Ruchir Puri","raw_affiliation_strings":["IBM Thomas J. Watson Research Center, Yorktown Heights, NY","IBM Thomas J. Watson Research Center Yorktown Heights, NY#TAB#"],"affiliations":[{"raw_affiliation_string":"IBM Thomas J. Watson Research Center, Yorktown Heights, NY","institution_ids":["https://openalex.org/I4210114115"]},{"raw_affiliation_string":"IBM Thomas J. Watson Research Center Yorktown Heights, NY#TAB#","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063522852","display_name":"David S. Kung","orcid":null},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]},{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"David S. Kung","raw_affiliation_strings":["IBM Thomas J. Watson Research Center, Yorktown Heights, NY","IBM Thomas J. Watson Research Center Yorktown Heights, NY#TAB#"],"affiliations":[{"raw_affiliation_string":"IBM Thomas J. Watson Research Center, Yorktown Heights, NY","institution_ids":["https://openalex.org/I4210114115"]},{"raw_affiliation_string":"IBM Thomas J. Watson Research Center Yorktown Heights, NY#TAB#","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5057709840","display_name":"Anthony D. Drumm","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Anthony D. Drumm","raw_affiliation_strings":["IBM Corporation, Rochester, MN"],"affiliations":[{"raw_affiliation_string":"IBM Corporation, Rochester, MN","institution_ids":["https://openalex.org/I1341412227"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5045722906"],"corresponding_institution_ids":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"],"apc_list":null,"apc_paid":null,"fwci":1.6972,"has_fulltext":false,"cited_by_count":25,"citation_normalized_percentile":{"value":0.84330568,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"30","last_page":"36"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/elmore-delay","display_name":"Elmore delay","score":0.8537519574165344},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.715052604675293},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6944769024848938},{"id":"https://openalex.org/keywords/delay-calculation","display_name":"Delay calculation","score":0.5889794230461121},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.5469014644622803},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.5290659666061401},{"id":"https://openalex.org/keywords/resistive-touchscreen","display_name":"Resistive touchscreen","score":0.5188294649124146},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5142185688018799},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4554639756679535},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.42173510789871216},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.29210227727890015},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.19488471746444702},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1729656159877777},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11721140146255493}],"concepts":[{"id":"https://openalex.org/C84434228","wikidata":"https://www.wikidata.org/wiki/Q4531332","display_name":"Elmore delay","level":4,"score":0.8537519574165344},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.715052604675293},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6944769024848938},{"id":"https://openalex.org/C174086752","wikidata":"https://www.wikidata.org/wiki/Q5253471","display_name":"Delay calculation","level":3,"score":0.5889794230461121},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.5469014644622803},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.5290659666061401},{"id":"https://openalex.org/C6899612","wikidata":"https://www.wikidata.org/wiki/Q852911","display_name":"Resistive touchscreen","level":2,"score":0.5188294649124146},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5142185688018799},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4554639756679535},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.42173510789871216},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.29210227727890015},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.19488471746444702},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1729656159877777},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11721140146255493},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/505306.505314","is_oa":false,"landing_page_url":"https://doi.org/10.1145/505306.505314","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 12th ACM Great Lakes symposium on VLSI","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.47999998927116394}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1984588379","https://openalex.org/W2007380193","https://openalex.org/W2012158212","https://openalex.org/W2076265641","https://openalex.org/W2126329142","https://openalex.org/W2131168529","https://openalex.org/W2133365606","https://openalex.org/W2140619390","https://openalex.org/W2142896025","https://openalex.org/W2154363431","https://openalex.org/W2169269717","https://openalex.org/W2402508669"],"related_works":["https://openalex.org/W2145535176","https://openalex.org/W4229446324","https://openalex.org/W2158805860","https://openalex.org/W1804063983","https://openalex.org/W1570180536","https://openalex.org/W2134944363","https://openalex.org/W2087387686","https://openalex.org/W3140640533","https://openalex.org/W2122901855","https://openalex.org/W2117925677"],"abstract_inverted_index":{"Interconnect":[0],"delays":[1,33,49,113,126],"represent":[2],"an":[3],"increasingly":[4],"dominant":[5],"portion":[6],"of":[7,31,133],"overall":[8],"circuit":[9],"delays.":[10],"During":[11],"timing-driven":[12],"physical":[13,51,139],"synthesis":[14,52,140],"process,":[15],"timing":[16],"analysis":[17],"is":[18,34],"repeatedly":[19],"performed":[20],"over":[21],"several":[22,146],"hundred":[23],"thousand":[24],"components.":[25],"Thus,":[26],"fast":[27],"and":[28,38,71,127],"accurate":[29,107],"estimation":[30,86],"interconnect":[32,48],"crucial.":[35],"Traditionally,":[36],"lumped":[37],"elmore":[39],"delay":[40,60,85,136],"models":[41,61],"have":[42],"been":[43],"widely":[44],"used":[45],"for":[46,109],"computing":[47],"in":[50,138],"due":[53],"to":[54,64,119,122],"their":[55],"computational":[56],"efficiency.":[57],"However,":[58],"these":[59],"are":[62],"known":[63],"be":[65],"inaccurate":[66],"since":[67],"they":[68],"ignore":[69],"slew":[70],"resistive":[72,90],"shielding":[73,91],"effects.":[74],"In":[75,130],"this":[76],"paper,":[77],"we":[78],"propose":[79],"a":[80],"new":[81],"iterative":[82],"refinement":[83],"based":[84],"approach":[87,102],"that":[88,99],"considers":[89],"along":[92],"with":[93],"driver":[94],"slew.":[95],"Experimental":[96],"results":[97,108],"show":[98],"the":[100,134],"proposed":[101,135],"gives":[103],"not":[104],"only":[105],"highly":[106],"far":[110],"end":[111,125],"RC-line":[112],"but":[114],"also":[115],"compares":[116],"very":[117],"favorably":[118],"more":[120],"difficult":[121],"match":[123],"source":[124,128],"slews.":[129],"addition,":[131],"use":[132],"model":[137],"yields":[141],"significant":[142],"performance":[143],"improvement":[144],"on":[145],"large":[147],"industrial":[148],"ASICs.":[149]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":3},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
