{"id":"https://openalex.org/W7155042649","doi":"https://doi.org/10.1145/3811410","title":"AccelHSA: Modeling Single-ISA Heterogeneous GPU Architectures","display_name":"AccelHSA: Modeling Single-ISA Heterogeneous GPU Architectures","publication_year":2026,"publication_date":"2026-04-21","ids":{"openalex":"https://openalex.org/W7155042649","doi":"https://doi.org/10.1145/3811410"},"language":"en","primary_location":{"id":"doi:10.1145/3811410","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3811410","pdf_url":null,"source":{"id":"https://openalex.org/S26056741","display_name":"ACM Transactions on Architecture and Code Optimization","issn_l":"1544-3566","issn":["1544-3566","1544-3973"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Architecture and Code Optimization","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"diamond","oa_url":"https://doi.org/10.1145/3811410","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5133878293","display_name":"Alexandros Moiras","orcid":null},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Alexandros Moiras","raw_affiliation_strings":["Electrical and Computer Engineering, National Technical University of Athens"],"raw_orcid":"https://orcid.org/0009-0001-3391-1009","affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, National Technical University of Athens","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006425693","display_name":"Konstantinos Iliakis","orcid":"https://orcid.org/0000-0002-1403-6851"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Konstantinos Iliakis","raw_affiliation_strings":["Electrical and Computer Engineering, National Technical University of Athens"],"raw_orcid":"https://orcid.org/0000-0002-1403-6851","affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, National Technical University of Athens","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043131021","display_name":"Dimitrios Soudris","orcid":"https://orcid.org/0000-0002-6930-6847"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Dimitrios Soudris","raw_affiliation_strings":["Electrical and Computer Engineering, National Technical University of Athens"],"raw_orcid":"https://orcid.org/0000-0002-6930-6847","affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, National Technical University of Athens","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5076432415","display_name":"Sotirios Xydis","orcid":"https://orcid.org/0000-0003-3151-2730"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Sotirios Xydis","raw_affiliation_strings":["Electrical and Computer Engineering, National Technical University of Athens"],"raw_orcid":"https://orcid.org/0000-0003-3151-2730","affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, National Technical University of Athens","institution_ids":["https://openalex.org/I174458059"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I174458059"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.49894907,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"23","issue":"2","first_page":"1","last_page":"25"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.8557999730110168,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.8557999730110168,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.03550000116229057,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.020400000736117363,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cuda","display_name":"CUDA","score":0.6833999752998352},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.6086000204086304},{"id":"https://openalex.org/keywords/symmetric-multiprocessor-system","display_name":"Symmetric multiprocessor system","score":0.5989999771118164},{"id":"https://openalex.org/keywords/general-purpose-computing-on-graphics-processing-units","display_name":"General-purpose computing on graphics processing units","score":0.5817000269889832},{"id":"https://openalex.org/keywords/homogeneous","display_name":"Homogeneous","score":0.5516999959945679},{"id":"https://openalex.org/keywords/graphics","display_name":"Graphics","score":0.53329998254776},{"id":"https://openalex.org/keywords/kernel","display_name":"Kernel (algebra)","score":0.4724999964237213},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.44999998807907104},{"id":"https://openalex.org/keywords/rendering","display_name":"Rendering (computer graphics)","score":0.41190001368522644}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8828999996185303},{"id":"https://openalex.org/C2778119891","wikidata":"https://www.wikidata.org/wiki/Q477690","display_name":"CUDA","level":2,"score":0.6833999752998352},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.6086000204086304},{"id":"https://openalex.org/C172430144","wikidata":"https://www.wikidata.org/wiki/Q17111997","display_name":"Symmetric multiprocessor system","level":2,"score":0.5989999771118164},{"id":"https://openalex.org/C50630238","wikidata":"https://www.wikidata.org/wiki/Q971505","display_name":"General-purpose computing on graphics processing units","level":3,"score":0.5817000269889832},{"id":"https://openalex.org/C66882249","wikidata":"https://www.wikidata.org/wiki/Q169336","display_name":"Homogeneous","level":2,"score":0.5516999959945679},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5503000020980835},{"id":"https://openalex.org/C21442007","wikidata":"https://www.wikidata.org/wiki/Q1027879","display_name":"Graphics","level":2,"score":0.53329998254776},{"id":"https://openalex.org/C74193536","wikidata":"https://www.wikidata.org/wiki/Q574844","display_name":"Kernel (algebra)","level":2,"score":0.4724999964237213},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.44999998807907104},{"id":"https://openalex.org/C205711294","wikidata":"https://www.wikidata.org/wiki/Q176953","display_name":"Rendering (computer graphics)","level":2,"score":0.41190001368522644},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.4115999937057495},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.38370001316070557},{"id":"https://openalex.org/C83283714","wikidata":"https://www.wikidata.org/wiki/Q121117","display_name":"Supercomputer","level":2,"score":0.3822000026702881},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.3643999993801117},{"id":"https://openalex.org/C2779851693","wikidata":"https://www.wikidata.org/wiki/Q183484","display_name":"Graphics processing unit","level":2,"score":0.3637000024318695},{"id":"https://openalex.org/C86111242","wikidata":"https://www.wikidata.org/wiki/Q859595","display_name":"Coprocessor","level":2,"score":0.35199999809265137},{"id":"https://openalex.org/C2781335571","wikidata":"https://www.wikidata.org/wiki/Q2633544","display_name":"GPU cluster","level":3,"score":0.3508000075817108},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.3434000015258789},{"id":"https://openalex.org/C206345919","wikidata":"https://www.wikidata.org/wiki/Q20380951","display_name":"Resource (disambiguation)","level":2,"score":0.3391999900341034},{"id":"https://openalex.org/C459310","wikidata":"https://www.wikidata.org/wiki/Q117801","display_name":"Computational science","level":1,"score":0.3165000081062317},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.28839999437332153},{"id":"https://openalex.org/C18945957","wikidata":"https://www.wikidata.org/wiki/Q5597193","display_name":"Graphics hardware","level":3,"score":0.2782999873161316},{"id":"https://openalex.org/C177774035","wikidata":"https://www.wikidata.org/wiki/Q1246948","display_name":"Granularity","level":2,"score":0.2703000009059906},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.26750001311302185},{"id":"https://openalex.org/C204323151","wikidata":"https://www.wikidata.org/wiki/Q905424","display_name":"Range (aeronautics)","level":2,"score":0.26330000162124634},{"id":"https://openalex.org/C158207573","wikidata":"https://www.wikidata.org/wiki/Q5747224","display_name":"Heterogeneous network","level":4,"score":0.2605000138282776},{"id":"https://openalex.org/C109772839","wikidata":"https://www.wikidata.org/wiki/Q2297645","display_name":"Software rendering","level":4,"score":0.2572999894618988}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3811410","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3811410","pdf_url":null,"source":{"id":"https://openalex.org/S26056741","display_name":"ACM Transactions on Architecture and Code Optimization","issn_l":"1544-3566","issn":["1544-3566","1544-3973"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Architecture and Code Optimization","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1145/3811410","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3811410","pdf_url":null,"source":{"id":"https://openalex.org/S26056741","display_name":"ACM Transactions on Architecture and Code Optimization","issn_l":"1544-3566","issn":["1544-3566","1544-3973"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Architecture and Code Optimization","raw_type":"journal-article"},"sustainable_development_goals":[{"score":0.6524836421012878,"id":"https://metadata.un.org/sdg/8","display_name":"Decent work and economic growth"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":32,"referenced_works":["https://openalex.org/W1973573211","https://openalex.org/W1995301561","https://openalex.org/W2011389593","https://openalex.org/W2037226295","https://openalex.org/W2047060659","https://openalex.org/W2070630412","https://openalex.org/W2093043622","https://openalex.org/W2128120785","https://openalex.org/W2142444503","https://openalex.org/W2147943147","https://openalex.org/W2158703410","https://openalex.org/W2170901118","https://openalex.org/W2409690919","https://openalex.org/W2470920449","https://openalex.org/W2510980549","https://openalex.org/W2606722458","https://openalex.org/W2907463061","https://openalex.org/W2981619930","https://openalex.org/W3017087102","https://openalex.org/W3043390534","https://openalex.org/W3046494740","https://openalex.org/W3175298944","https://openalex.org/W3206857466","https://openalex.org/W4226212055","https://openalex.org/W4234578094","https://openalex.org/W4242709165","https://openalex.org/W4250692521","https://openalex.org/W4385188569","https://openalex.org/W4389132884","https://openalex.org/W4401211787","https://openalex.org/W4414735877","https://openalex.org/W4416392057"],"related_works":[],"abstract_inverted_index":{"Initially":[0],"branded":[1],"as":[2],"dedicated":[3],"graphics":[4],"processing":[5],"accelerators,":[6],"GPUs":[7],"now":[8],"find":[9],"applications":[10],"in":[11],"an":[12],"ever-growing":[13],"range":[14],"of":[15,33,43,54,67,78,112,128,152,159,171],"domains,":[16],"including":[17],"artificial":[18],"intelligence,":[19],"high-performance":[20],"computing,":[21],"self-driving":[22],"vehicles,":[23],"and":[24,37,174],"bioinformatics.":[25],"However,":[26],"this":[27,62],"diversity":[28],"comes":[29],"at":[30],"the":[31,41,44,51,59,65,76,79,87,98,109,113,129,150,153,157,169,179],"cost":[32],"reduced":[34],"resource":[35,172],"efficiency":[36,77],"micro-architectural":[38,110],"affinity.":[39],"Evidently,":[40],"homogeneity":[42],"GPU":[45,55,70,81,90,99,162,181,187],"hardware":[46],"struggles":[47],"to":[48,74,92,125],"cope":[49],"with":[50,133,194],"vast":[52],"heterogeneity":[53],"applications.":[56],"Motivated":[57],"by":[58],"aforementioned":[60],"observations,":[61],"article":[63],"introduces":[64],"concept":[66],"Single-ISA":[68],"Heterogeneous":[69],"architectures.":[71],"In":[72],"order":[73],"explore":[75],"new":[80],"architectural":[82],"paradigm,":[83],"we":[84],"extend":[85],"Accel-Sim,":[86],"state-of-the-art,":[88],"cycle-accurate":[89],"simulator":[91],"support":[93],"single-ISA":[94,160],"heterogeneous":[95,161,180],"cores":[96],"within":[97],"chip.":[100],"The":[101,120],"proposed":[102],"implementation,":[103],"called":[104],"AccelHSA,":[105],"supports":[106,141],"independently":[107],"tuning":[108],"characteristics":[111],"cores,":[114],"unlocking":[115],"a":[116,134,165,190,195],"wide":[117],"design":[118],"space.":[119],"CUDA":[121],"API":[122],"is":[123,183],"extended":[124],"allow":[126],"control":[127],"kernel-to-core-type":[130],"mapping":[131],"along":[132],"newly":[135],"developed":[136],"kernel":[137],"launching":[138],"model":[139],"that":[140],"concurrent":[142],"execution,":[143],"aimed":[144],"at,":[145],"albeit":[146],"not":[147],"limited":[148],"to,":[149],"context":[151],"simulator.":[154],"We":[155],"showcase":[156],"impact":[158],"architectures":[163],"via":[164],"case":[166],"study":[167],"targeting":[168],"collocation":[170],"sensitive":[173],"insensitive":[175],"HPC":[176],"kernels.":[177],"Finally,":[178],"architecture":[182],"evaluated":[184],"against":[185],"homogeneous":[186],"baselines,":[188],"demonstrating":[189],"27.07%":[191],"average":[192],"speedup":[193],"marginal":[196],"0.47%":[197],"area":[198],"overhead.":[199]},"counts_by_year":[],"updated_date":"2026-06-28T06:15:30.350997","created_date":"2026-04-22T00:00:00"}
