{"id":"https://openalex.org/W7167032136","doi":"https://doi.org/10.1145/3797905.3807854","title":"RPFC: A Router Partitioning and Forward Channel Routing Framework for 2.5D MCM System","display_name":"RPFC: A Router Partitioning and Forward Channel Routing Framework for 2.5D MCM System","publication_year":2026,"publication_date":"2026-07-02","ids":{"openalex":"https://openalex.org/W7167032136","doi":"https://doi.org/10.1145/3797905.3807854"},"language":null,"primary_location":{"id":"doi:10.1145/3797905.3807854","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3797905.3807854","pdf_url":null,"source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 40th ACM International Conference on Supercomputing","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://doi.org/10.1145/3797905.3807854","any_repository_has_fulltext":null},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101650481","display_name":"S. Tao","orcid":"https://orcid.org/0009-0005-5869-5794"},"institutions":[{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Sicheng Tao","raw_affiliation_strings":["State Key Lab of Processors, Institute of ComputingTechnology, CAS, Beijing, China, Beijing, China and University of Chinese Academy of Sciences, Beijing, China"],"raw_orcid":"https://orcid.org/0009-0005-5869-5794","affiliations":[{"raw_affiliation_string":"State Key Lab of Processors, Institute of ComputingTechnology, CAS, Beijing, China, Beijing, China and University of Chinese Academy of Sciences, Beijing, China","institution_ids":["https://openalex.org/I4210090176"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064686693","display_name":"Guo Zhenjiang","orcid":null},"institutions":[{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhenjiang Guo","raw_affiliation_strings":["State Key Lab of Processors, Institute of ComputingTechnology, CAS, Beijing, China, Beijing, China and University of Chinese Academy of Sciences, Beijing, China"],"raw_orcid":"https://orcid.org/0009-0001-8975-9149","affiliations":[{"raw_affiliation_string":"State Key Lab of Processors, Institute of ComputingTechnology, CAS, Beijing, China, Beijing, China and University of Chinese Academy of Sciences, Beijing, China","institution_ids":["https://openalex.org/I4210090176"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100430605","display_name":"Tianyi Liu","orcid":"https://orcid.org/0000-0002-5341-1343"},"institutions":[{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Tianyi Liu","raw_affiliation_strings":["State Key Lab of Processors, Institute of ComputingTechnology, CAS, Beijing, China, Beijing, China and University of Chinese Academy of Sciences, Beijing, China"],"raw_orcid":"https://orcid.org/0000-0002-5341-1343","affiliations":[{"raw_affiliation_string":"State Key Lab of Processors, Institute of ComputingTechnology, CAS, Beijing, China, Beijing, China and University of Chinese Academy of Sciences, Beijing, China","institution_ids":["https://openalex.org/I4210090176"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5108047889","display_name":"Yi-Xiang Wang","orcid":"https://orcid.org/0000-0001-5697-0717"},"institutions":[{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jian Wang","raw_affiliation_strings":["State Key Lab of Processors, Institute of ComputingTechnology, CAS, Beijing, China, Beijing, China and University of Chinese Academy of Sciences, Beijing, China"],"raw_orcid":"https://orcid.org/0009-0009-0651-5965","affiliations":[{"raw_affiliation_string":"State Key Lab of Processors, Institute of ComputingTechnology, CAS, Beijing, China, Beijing, China and University of Chinese Academy of Sciences, Beijing, China","institution_ids":["https://openalex.org/I4210090176"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4210090176"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.93997755,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"590","last_page":"602"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9473999738693237,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9473999738693237,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.028599999845027924,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.010300000198185444,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/deadlock","display_name":"Deadlock","score":0.7853999733924866},{"id":"https://openalex.org/keywords/virtual-channel","display_name":"Virtual channel","score":0.6912000179290771},{"id":"https://openalex.org/keywords/router","display_name":"Router","score":0.6657999753952026},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.6182000041007996},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.5849999785423279},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.5313000082969666},{"id":"https://openalex.org/keywords/deadlock-prevention-algorithms","display_name":"Deadlock prevention algorithms","score":0.4519999921321869}],"concepts":[{"id":"https://openalex.org/C159023740","wikidata":"https://www.wikidata.org/wiki/Q623276","display_name":"Deadlock","level":2,"score":0.7853999733924866},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7160999774932861},{"id":"https://openalex.org/C2777076873","wikidata":"https://www.wikidata.org/wiki/Q2291875","display_name":"Virtual channel","level":3,"score":0.6912000179290771},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.6741999983787537},{"id":"https://openalex.org/C2775896111","wikidata":"https://www.wikidata.org/wiki/Q642560","display_name":"Router","level":2,"score":0.6657999753952026},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.6182000041007996},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.5849999785423279},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.5597000122070312},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.5313000082969666},{"id":"https://openalex.org/C113429609","wikidata":"https://www.wikidata.org/wiki/Q4060699","display_name":"Deadlock prevention algorithms","level":3,"score":0.4519999921321869},{"id":"https://openalex.org/C2984173633","wikidata":"https://www.wikidata.org/wiki/Q22725","display_name":"Routing algorithm","level":4,"score":0.37059998512268066},{"id":"https://openalex.org/C84511453","wikidata":"https://www.wikidata.org/wiki/Q2914952","display_name":"Concurrency control","level":3,"score":0.3336000144481659},{"id":"https://openalex.org/C204948658","wikidata":"https://www.wikidata.org/wiki/Q1119410","display_name":"Static routing","level":4,"score":0.3093000054359436},{"id":"https://openalex.org/C184896649","wikidata":"https://www.wikidata.org/wiki/Q290066","display_name":"Routing table","level":4,"score":0.30660000443458557},{"id":"https://openalex.org/C2983435990","wikidata":"https://www.wikidata.org/wiki/Q22725","display_name":"Network routing","level":3,"score":0.30630001425743103},{"id":"https://openalex.org/C104954878","wikidata":"https://www.wikidata.org/wiki/Q1648707","display_name":"Routing protocol","level":3,"score":0.26100000739097595},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.25540000200271606}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3797905.3807854","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3797905.3807854","pdf_url":null,"source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 40th ACM International Conference on Supercomputing","raw_type":"proceedings-article"}],"best_oa_location":{"id":"doi:10.1145/3797905.3807854","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3797905.3807854","pdf_url":null,"source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 40th ACM International Conference on Supercomputing","raw_type":"proceedings-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":35,"referenced_works":["https://openalex.org/W2008041840","https://openalex.org/W2023328603","https://openalex.org/W2049036199","https://openalex.org/W2080179651","https://openalex.org/W2116147573","https://openalex.org/W2158518121","https://openalex.org/W2169875292","https://openalex.org/W2234584938","https://openalex.org/W2884166449","https://openalex.org/W2884810594","https://openalex.org/W2945577986","https://openalex.org/W3016212306","https://openalex.org/W3092226368","https://openalex.org/W3094554961","https://openalex.org/W3140062895","https://openalex.org/W3209605964","https://openalex.org/W4280498518","https://openalex.org/W4280633094","https://openalex.org/W4280644295","https://openalex.org/W4293731757","https://openalex.org/W4295048212","https://openalex.org/W4311263203","https://openalex.org/W4388833455","https://openalex.org/W4392713695","https://openalex.org/W4393145479","https://openalex.org/W4396817352","https://openalex.org/W4399264332","https://openalex.org/W4399487283","https://openalex.org/W4401010883","https://openalex.org/W4404848020","https://openalex.org/W4405513857","https://openalex.org/W4408163976","https://openalex.org/W4409248543","https://openalex.org/W7110379358","https://openalex.org/W7133557988"],"related_works":[],"abstract_inverted_index":{"Modular":[0],"chiplet":[1,5],"design":[2],"enables":[3],"independent":[4],"development,":[6],"but":[7],"introduces":[8],"integration":[9],"deadlocks":[10],"when":[11],"assembling":[12],"deadlock-free":[13],"chiplets":[14],"into":[15],"2.5D":[16],"multi-chiplet":[17],"module":[18],"(MCM)":[19],"systems.":[20],"Existing":[21],"solutions":[22,55],"exhibit":[23],"limitations:":[24],"(1)":[25],"turn-restriction":[26],"approaches":[27],"treat":[28],"all":[29,48],"potential":[30],"deadlock":[31,37,61],"cycles":[32],"uniformly":[33],"without":[34],"distinguishing":[35],"different":[36],"structures;":[38],"(2)":[39],"virtual":[40],"network":[41],"schemes":[42],"simply":[43],"duplicate":[44],"channel":[45],"buffers":[46],"on":[47],"routers,":[49],"resulting":[50],"in":[51],"substantial":[52],"redundancy.":[53],"These":[54],"overlook":[56],"the":[57],"structural":[58],"differences":[59],"among":[60],"types,":[62],"leading":[63],"to":[64],"unnecessary":[65],"routing":[66],"constraints":[67],"and":[68],"redundant":[69],"hardware.":[70]},"counts_by_year":[],"updated_date":"2026-07-03T06:20:38.788640","created_date":"2026-07-03T00:00:00"}
