{"id":"https://openalex.org/W7165126326","doi":"https://doi.org/10.1145/3787109.3815295","title":"GeoRoute: Signoff-Clean Analog Routing via Pin-Aligned Graph Construction for Robust Pin Access","display_name":"GeoRoute: Signoff-Clean Analog Routing via Pin-Aligned Graph Construction for Robust Pin Access","publication_year":2026,"publication_date":"2026-06-18","ids":{"openalex":"https://openalex.org/W7165126326","doi":"https://doi.org/10.1145/3787109.3815295"},"language":null,"primary_location":{"id":"doi:10.1145/3787109.3815295","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3787109.3815295","pdf_url":null,"source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Great Lakes Symposium on VLSI 2026","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://doi.org/10.1145/3787109.3815295","any_repository_has_fulltext":null},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111223918","display_name":"Jiakai Pan","orcid":null},"institutions":[{"id":"https://openalex.org/I157773358","display_name":"Sun Yat-sen University","ror":"https://ror.org/0064kty71","country_code":"CN","type":"education","lineage":["https://openalex.org/I157773358"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Pan Jiakai","raw_affiliation_strings":["Sun Yat-sen University, Zhuhai, China"],"raw_orcid":"https://orcid.org/0009-0001-4896-869X","affiliations":[{"raw_affiliation_string":"Sun Yat-sen University, Zhuhai, China","institution_ids":["https://openalex.org/I157773358"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076927514","display_name":"W. Wang","orcid":"https://orcid.org/0009-0006-3669-3402"},"institutions":[{"id":"https://openalex.org/I157773358","display_name":"Sun Yat-sen University","ror":"https://ror.org/0064kty71","country_code":"CN","type":"education","lineage":["https://openalex.org/I157773358"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wang Wenjia","raw_affiliation_strings":["Sun Yat-sen University, Zhuhai, China"],"raw_orcid":"https://orcid.org/0009-0005-5387-2579","affiliations":[{"raw_affiliation_string":"Sun Yat-sen University, Zhuhai, China","institution_ids":["https://openalex.org/I157773358"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102111199","display_name":"Wenjun Huang","orcid":"https://orcid.org/0009-0001-3228-5296"},"institutions":[{"id":"https://openalex.org/I157773358","display_name":"Sun Yat-sen University","ror":"https://ror.org/0064kty71","country_code":"CN","type":"education","lineage":["https://openalex.org/I157773358"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Huang Wenjun","raw_affiliation_strings":["Sun Yat-sen University, Zhuhai, China"],"raw_orcid":"https://orcid.org/0009-0001-3228-5296","affiliations":[{"raw_affiliation_string":"Sun Yat-sen University, Zhuhai, China","institution_ids":["https://openalex.org/I157773358"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5099058807","display_name":"Shengzhi Shen","orcid":null},"institutions":[{"id":"https://openalex.org/I157773358","display_name":"Sun Yat-sen University","ror":"https://ror.org/0064kty71","country_code":"CN","type":"education","lineage":["https://openalex.org/I157773358"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shen Shengzhi","raw_affiliation_strings":["Sun Yat-sen University, Zhuhai, China"],"raw_orcid":"https://orcid.org/0009-0001-4724-4307","affiliations":[{"raw_affiliation_string":"Sun Yat-sen University, Zhuhai, China","institution_ids":["https://openalex.org/I157773358"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058196150","display_name":"Yuhe Wang","orcid":"https://orcid.org/0000-0002-2267-698X"},"institutions":[{"id":"https://openalex.org/I157773358","display_name":"Sun Yat-sen University","ror":"https://ror.org/0064kty71","country_code":"CN","type":"education","lineage":["https://openalex.org/I157773358"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wang Yuhe","raw_affiliation_strings":["Sun Yat-sen University, Zhuhai, China"],"raw_orcid":"https://orcid.org/0000-0002-8416-3995","affiliations":[{"raw_affiliation_string":"Sun Yat-sen University, Zhuhai, China","institution_ids":["https://openalex.org/I157773358"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5031559030","display_name":"Jianguo Hu","orcid":"https://orcid.org/0009-0005-8872-8593"},"institutions":[{"id":"https://openalex.org/I157773358","display_name":"Sun Yat-sen University","ror":"https://ror.org/0064kty71","country_code":"CN","type":"education","lineage":["https://openalex.org/I157773358"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Hu Jianguo","raw_affiliation_strings":["Sun Yat-sen University, Zhuhai, China"],"raw_orcid":"https://orcid.org/0009-0005-8872-8593","affiliations":[{"raw_affiliation_string":"Sun Yat-sen University, Zhuhai, China","institution_ids":["https://openalex.org/I157773358"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I157773358"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"448","last_page":"453"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.881600022315979,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.881600022315979,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.030300000682473183,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.023900000378489494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/router","display_name":"Router","score":0.7505999803543091},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.5575000047683716},{"id":"https://openalex.org/keywords/graph","display_name":"Graph","score":0.5390999913215637},{"id":"https://openalex.org/keywords/grid","display_name":"Grid","score":0.5020999908447266},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4683000147342682},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.33649998903274536},{"id":"https://openalex.org/keywords/directed-graph","display_name":"Directed graph","score":0.31290000677108765}],"concepts":[{"id":"https://openalex.org/C2775896111","wikidata":"https://www.wikidata.org/wiki/Q642560","display_name":"Router","level":2,"score":0.7505999803543091},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7117999792098999},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.5575000047683716},{"id":"https://openalex.org/C132525143","wikidata":"https://www.wikidata.org/wiki/Q141488","display_name":"Graph","level":2,"score":0.5390999913215637},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.5213000178337097},{"id":"https://openalex.org/C187691185","wikidata":"https://www.wikidata.org/wiki/Q2020720","display_name":"Grid","level":2,"score":0.5020999908447266},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4683000147342682},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3865000009536743},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.33649998903274536},{"id":"https://openalex.org/C146380142","wikidata":"https://www.wikidata.org/wiki/Q1137726","display_name":"Directed graph","level":2,"score":0.31290000677108765},{"id":"https://openalex.org/C184896649","wikidata":"https://www.wikidata.org/wiki/Q290066","display_name":"Routing table","level":4,"score":0.30889999866485596},{"id":"https://openalex.org/C88230418","wikidata":"https://www.wikidata.org/wiki/Q131476","display_name":"Graph theory","level":2,"score":0.30410000681877136},{"id":"https://openalex.org/C104954878","wikidata":"https://www.wikidata.org/wiki/Q1648707","display_name":"Routing protocol","level":3,"score":0.29989999532699585},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.27320000529289246},{"id":"https://openalex.org/C145580432","wikidata":"https://www.wikidata.org/wiki/Q6497118","display_name":"Lattice graph","level":5,"score":0.2721000015735626},{"id":"https://openalex.org/C2779530757","wikidata":"https://www.wikidata.org/wiki/Q1207505","display_name":"Quality (philosophy)","level":2,"score":0.2720000147819519},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.2660999894142151},{"id":"https://openalex.org/C94600068","wikidata":"https://www.wikidata.org/wiki/Q7371621","display_name":"Routing domain","level":5,"score":0.257999986410141},{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.2515000104904175}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3787109.3815295","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3787109.3815295","pdf_url":null,"source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Great Lakes Symposium on VLSI 2026","raw_type":"proceedings-article"}],"best_oa_location":{"id":"doi:10.1145/3787109.3815295","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3787109.3815295","pdf_url":null,"source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Great Lakes Symposium on VLSI 2026","raw_type":"proceedings-article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.4803656041622162}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1969483458","https://openalex.org/W2945221971","https://openalex.org/W2997579412","https://openalex.org/W3111845806","https://openalex.org/W4236728296","https://openalex.org/W4281972196","https://openalex.org/W4285134926","https://openalex.org/W4378800868","https://openalex.org/W4379115889","https://openalex.org/W4384162028","https://openalex.org/W4385938239","https://openalex.org/W4404134257","https://openalex.org/W4411639763","https://openalex.org/W4411713485","https://openalex.org/W4411713513"],"related_works":[],"abstract_inverted_index":{"Existing":[0],"analog":[1,104],"layout":[2,109],"routers":[3,90],"that":[4,41],"depend":[5],"on":[6],"a":[7,22,38,60,99],"fixed":[8],"global":[9],"routing":[10],"grid":[11],"fail":[12],"when":[13],"pin":[14],"locations":[15],"do":[16],"not":[17],"align":[18],"with":[19,54,80],"the":[20],"grid,":[21],"situation":[23],"common":[24],"in":[25],"hard":[26],"intellectual-property":[27],"(IP)":[28],"macro":[29],"integration":[30],"and":[31,59,74,84,95,111],"manual":[32],"designs.":[33],"This":[34],"brief":[35],"presents":[36],"GeoRoute,":[37],"geometry-driven":[39],"router":[40],"constructs":[42],"an":[43],"instance-specific,":[44],"pin-aligned":[45],"graph":[46],"for":[47],"each":[48],"connection.":[49],"A":[50],"multi-constraint":[51],"A*":[52],"search":[53],"in-search":[55],"design-rule":[56],"checking":[57],"(DRC)":[58],"two-stage":[61],"intra-path":[62],"conflict":[63],"resolution":[64],"mechanism":[65],"efficiently":[66],"produces":[67],"signoff-clean":[68],"paths.":[69],"Across":[70],"multiple":[71],"process":[72],"nodes":[73],"benchmarks,":[75],"GeoRoute":[76],"achieves":[77],"100%":[78],"completion":[79],"zero":[81],"DRC":[82],"violations":[83],"layout-versus-schematic":[85],"(LVS)":[86],"clean":[87],"results;":[88],"reference":[89],"average":[91],"67\u201392%":[92],"completion.":[93],"Fabrication":[94],"post-silicon":[96],"validation":[97],"of":[98],"180":[100],"nm":[101],"near-field":[102],"communication":[103],"front-end":[105],"(NFC-AFE)":[106],"further":[107],"demonstrate":[108],"quality":[110],"engineering":[112],"feasibility.":[113]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2026-06-19T00:00:00"}
